M25PE40-VMC6G NUMONYX, M25PE40-VMC6G Datasheet - Page 61

• Manufacturer Part Number: M25PE40-VMC6G
• Description: IC SRL FLSH 4MB 75MHZ 8MLP
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M25PE40-VMC6G

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 75MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-MLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M25PE40
Table 29.
10-Dec-2007
15-Jan-2007
23-Jan-2007
03-Jan-2007
Date
Document revision history (continued)
Revision
6
7
8
9
50 MHz frequency added. SO8N package added, VFQFPN and
SO8W package specifications updated (see
mechanical).
The sectors are further divided up into subsectors (see
Memory
Bus master and memory devices on the SPI bus
explanatory paragraph added.
added.
added, reset timings table split into
Table 24: Timings after a Reset Low
At power-up the WIP bit is reset (see
power-down).
V
timing line of t
– WP pin replaces TSL (T7X technology), see
–
– subsector protection granularity removed in T9HX process, still
–
– Status Register
Small text changes.
T7X process name corrected.
Write Enable Latch (WEL) bit is reset also on completion of the
Subsector Erase, Bulk Erase, Write to Lock Register and Write
Status Register instructions (see
(WRDI)).
Address bit A20 is not Don’t care
Erase (SE) instruction
products manufactured in the T9HX process.
Removed ‘low voltage’ from the title.
Table 18: DC characteristics (75 MHz operation, T9HX (0.11 µm)
process)
(0.11µm) process)
Added ECOPACK® text in
Updated the value for the maximum clock frequency (from 50 to
75 MHz) through the document.
Minor text changes.
Applied Numonyx branding.
Products processed in T9HX process added to datasheet:
IO
Protect (W) or Top Sector Lock (TSL)
Write Status Register (WRSR)
instructions added for T9HX process
exists in T7X process
Table 4: Memory organization
max changed in
Section 4.8: Protection modes
organization).
and
Table 22: AC characteristics (75 MHz operation, T9HX
SHQZ
BP2, BP1, BP0 bits
added.
moved in
Table 13: Absolute maximum
sequence. SO8N package is only available in
Important note on page 6
Section 12: Package
Changes
Figure 28: Output
VCC supply voltage
updated to show subsectors
and
Section 6.2: Write Disable
(Note 1
Table 23: Reset conditions
pulse.
Section 7: Power-up and
Subsector Erase (SSE)
modified.
and
modified) in the
SRWD bit
Section 12: Package
Section 2.6: Write
timing.
mechanical.
Section 8: Reset
Revision history
updated and
added.
ratings. End
and
added.
VSS ground
Table 4:
Figure 4:
Sector
and
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