M45PE20-VMP6G NUMONYX, M45PE20-VMP6G Datasheet

IC FLASH 2MBIT 75MHZ 8VFQFPN

M45PE20-VMP6G

Manufacturer Part Number
M45PE20-VMP6G
Description
IC FLASH 2MBIT 75MHZ 8VFQFPN
Manufacturer
NUMONYX
Series
Forté™r

Specifications of M45PE20-VMP6G

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
2M (256K x 8)
Speed
75MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-VFQFN, 8-VFQFPN
Memory Configuration
256K X 8
Ic Interface Type
Serial, SPI
Clock Frequency
25MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
VDFPN
No. Of Pins
8
Interface Type
Serial, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M45PE20-VMP6G
Manufacturer:
ST
0
Part Number:
M45PE20-VMP6G
Manufacturer:
ST
Quantity:
20 000
FEATURES SUMMARY
October 2004
2Mbit of Page-Erasable Flash Memory
Page Write (up to 256 Bytes) in 11ms (typical)
Page Program (up to 256 Bytes) in 1.2ms
(typical)
Page Erase (256 Bytes) in 10ms (typical)
Sector Erase (512 Kbit)
2.7 to 3.6V Single Supply Voltage
SPI Bus Compatible Serial Interface
25MHz Clock Rate (maximum)
Deep Power-down Mode 1 A (typical)
Electronic Signature
More than 100,000 Write Cycles
More than 20 Year Data Retention
JEDEC Standard Two-Byte Signature
(4012h)
2 Mbit, Low Voltage, Page-Erasable Serial Flash Memory
With Byte-Alterability and a 25 MHz SPI Bus Interface
Figure 1. Packages
VDFPN8 (MP)
150 mil width
8
SO8 (MN)
(MLP8)
1
M45PE20
1/35

Related parts for M45PE20-VMP6G

M45PE20-VMP6G Summary of contents

Page 1

... SPI Bus Compatible Serial Interface 25MHz Clock Rate (maximum) Deep Power-down Mode 1 A (typical) Electronic Signature – JEDEC Standard Two-Byte Signature (4012h) More than 100,000 Write Cycles More than 20 Year Data Retention October 2004 Figure 1. Packages 8 1 SO8 (MN) 150 mil width VDFPN8 (MP) (MLP8) M45PE20 1/35 ...

Page 2

... M45PE20 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. SO and VDFPN Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Serial Data Output ( Serial Data Input ( Serial Clock ( Chip Select ( Reset (Reset Write Protect ( SPI MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Bus Master and Memory Devices on the SPI Bus Figure 5 ...

Page 3

... DC AND AC PARAMETERS Table 8. Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 9. AC Measurement Conditions Figure 20.AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 10. Capacitance Table 11. DC Characteristics Table 12. AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 21.Serial Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 22.Write Protect Setup and Hold Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 23.Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 24.Reset AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 M45PE20 3/35 ...

Page 4

... M45PE20 PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 25.SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Outline . . . . 31 Table 13. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Mechanical Data 31 Figure 26.MLP8, 8-lead Very thin Dual Flat Package No lead, 6x5mm, Package Outline . . . . . . . 32 Table 14 ...

Page 5

... SUMMARY DESCRIPTION The M45PE20 is a 2Mbit (256K x 8 bit) Serial Paged Flash Memory accessed by a high speed SPI-compatible bus. The memory can be written or programmed 1 to 256 bytes at a time, using the Page Write or Page Program instruction. The Page Write instruction consists of an integrated Page Erase cycle fol- lowed by a Page Program cycle ...

Page 6

... M45PE20 SIGNAL DESCRIPTION Serial Data Output (Q). This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial Clock (C). Serial Data Input (D). This input signal is used to transfer data serially into the device. It receives in- structions, addresses, and the data to be pro- grammed ...

Page 7

... Stand-by mode and not transferring data: – C remains at 0 for (CPOL=0, CPHA=0) – C remains at 1 for (CPOL=1, CPHA= SPI Memory SPI Memory Device Device M45PE20 SPI Memory Device AI04043B MSB AI01438B 7/35 ...

Page 8

... M45PE20 OPERATING FEATURES Sharing the Overhead of Modifying Data To write or program one (or more) data bytes, two instructions are required: Write Enable (WREN), which is one byte, and a Page Write (PW) or Page Program (PP) sequence, which consists of four bytes plus data. This is followed by the internal cy- ...

Page 9

... The environments where non-volatile memory de- vices are used can be very noisy. No SPI device can operate correctly in the presence of excessive noise. To help combat this, the M45PE20 features the following data protection mechanisms: Power On Reset and an internal timer (t can provide protection against inadvertant changes while the power supply is outside the operating specification ...

Page 10

... M45PE20 MEMORY ORGANIZATION The memory is organized as: 1024 pages (256 bytes each). 262,144 bytes (8 bits each) 4 sectors (512 Kbits, 65536 bytes each) Each page can be individually: – programmed (bits are programmed from – erased (bits are erased from – written (bits are changed to either Figure 6 ...

Page 11

... Erase cycle continues unaffected. One-byte Instruction Code 0000 0110 0000 0100 1001 1111 0000 0101 0000 0011 0000 1011 0000 1010 0000 0010 1101 1011 1101 1000 1011 1001 1010 1011 M45PE20 Address Dummy Bytes Bytes 06h 0 0 04h 0 0 9Fh 0 0 ...

Page 12

... M45PE20 Write Enable (WREN) The Write Enable (WREN) instruction sets the Write Enable Latch (WEL) bit. The Write Enable Latch (WEL) bit must be set pri every Page Write (PW), Page Program (PP), Figure 7. Write Enable (WREN) Instruction Sequence Write Disable (WRDI) The Write Disable (WRDI) instruction resets the Write Enable Latch (WEL) bit ...

Page 13

... When Chip Select (S) is driven High, the device is put in the Standby Power mode. Once in the Standby Power mode, the device waits to be se- lected, so that it can receive, decode and execute instructions. Device Identification Memory Type 40h Manufacturer Identification MSB M45PE20 Figure Memory Capacity 12h Device Identification MSB AI06809 9.. 13/35 ...

Page 14

... M45PE20 Read Status Register (RDSR) The Read Status Register (RDSR) instruction al- lows the Status Register to be read. The Status Register may be read at any time, even while a Program, Erase or Write cycle is in progress. When one of these cycles is in progress rec- ommended to check the Write In Progress (WIP) bit before sending a new instruction to the device ...

Page 15

... High at any time during data out- put. Any Read Data Bytes (READ) instruction, while an Erase, Program or Write cycle is in Figure 11.. progress, is rejected without having any effects on the cycle that is in progress 24-Bit Address MSB Data Out 1 Data Out MSB AI03748D M45PE20 15/35 ...

Page 16

... M45PE20 Read Data Bytes at Higher Speed (FAST_READ) The device is first selected by driving Chip Select (S) Low. The instruction code for the Read Data Bytes at Higher Speed (FAST_READ) instruction is followed by a 3-byte address (A23-A0) and a dummy byte, each bit being latched-in during the rising edge of Serial Clock (C) ...

Page 17

... Hardware Protected is not executed. Any Page Write (PW) instruction, while an Erase, Program or Write cycle is in progress, is rejected without having any effects on the cycle that is in Figure 13.. progress 24-Bit Address MSB Data Byte MSB Data Byte MSB Data Byte MSB AI04045 M45PE20 ) is PW 17/35 ...

Page 18

... M45PE20 Page Program (PP) The Page Program (PP) instruction allows bytes to be programmed in the memory (changing bits from only). Before it can be accepted, a Write En- able (WREN) instruction must previously have been executed. After the Write Enable (WREN) in- struction has been decoded, the device sets the Write Enable Latch (WEL) ...

Page 19

... A Page Erase (PE) instruction applied to a page that is Hardware Protected is not executed. Any Page Erase (PE) instruction, while an Erase, Program or Write cycle is in progress, is rejected Figure 15.. without having any effects on the cycle that is in progress Instruction 24 Bit Address 23 22 MSB M45PE20 ) is initiated. While the Page Erase cy AI04046 19/35 ...

Page 20

... M45PE20 Sector Erase (SE) The Sector Erase (SE) instruction sets to 1 (FFh) all bits inside the chosen sector. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction has been decod- ed, the device sets the Write Enable Latch (WEL). ...

Page 21

... Power-down mode is entered. Any Deep Power-down (DP) instruction, while an Erase, Program or Write cycle is in progress, is re- jected without having any effects on the cycle that is in progress Instruction Stand-by Mode CC2 DP Deep Power-down Mode M45PE20 Figure 17.. before the DP and the Deep AI03753D 21/35 ...

Page 22

... M45PE20 Release from Deep Power-down (RDP) Once the device has entered the Deep Power- down mode, all instructions are ignored except the Release from Deep Power-down (RDP) instruc- tion. Executing this instruction takes the device out of the Deep Power-down mode. The Release from Deep Power-down (RDP) in- ...

Page 23

... V (min) level CC CC Table 6.. , has elapsed, after V VSL CC (min), the device can be selected for CC delay is not yet PUW supply. Each de drops from the operat all operations are disabled WI Device fully accessible time M45PE20 has risen rail decou- AI04009C 23/35 ...

Page 24

... M45PE20 Table 6. Power-Up Timing and V Symbol 1 V (min low t CC VSL 1 Time delay before the first Write, Program or Erase instruction t PUW 1 Write Inhibit Voltage V WI Note: 1. These parameters are characterized only, over the temperature range –40°C to +85°C. INITIAL DELIVERY STATE ...

Page 25

... JEDEC Std JESD22-A114A (C1=100 pF, R1=1500 this specification, is not implied. Exposure to Ab- solute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Parameter 2 , R2=500 ) M45PE20 Min. Max. Unit –65 150 °C 1 °C See note – ...

Page 26

... M45PE20 DC AND AC PARAMETERS This section summarizes the operating and mea- surement conditions, and the DC and AC charac- teristics of the device. The parameters in the DC and AC Characteristic tables that follow are de- rived from tests performed under the Measure- Table 8. Operating Conditions Symbol V Supply Voltage ...

Page 27

... Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH Test Condition (in addition to those in Table 8 0.1V / 0.9 MHz open 1 –100 A OH M45PE20 Min. Max. Unit ± 2 µA ± 2 µA 50 µA 10 µ – 0.5 0. 0. –0 27/35 ...

Page 28

... M45PE20 Table 12. AC Characteristics Test conditions specified in Symbol Alt. Clock Frequency for the following instructions: FAST_READ, PW, PP PE, SE, DP, RDP, WREN, WRDI, RDSR Clock Frequency for READ f R instructions 1 t Clock High Time t CLH Clock Low Time t CLL CL Clock Slew Rate Active Setup Time (relative to C) ...

Page 29

... Figure 21. Serial Input Timing S tCHSL C tDVCH D High Impedance Q Figure 22. Write Protect Setup and Hold Timing W tWHSL High Impedance Q tSLCH tCHSH tCHDX tCLCH MSB IN M45PE20 tSHSL tSHCH tCHCL LSB IN AI01447C tSHWL AI07439 29/35 ...

Page 30

... M45PE20 Figure 23. Output Timing S C tCLQV tCLQX tCLQX Q ADDR.LSB IN D Figure 24. Reset AC Waveforms S Reset 30/35 tCH tCLQV tQLQH tQHQL tSHRH tRHSL tRLRH tCL tSHQZ LSB OUT AI01449D AI06808 ...

Page 31

... inches Typ. Min. 0.053 0.004 0.013 0.007 0.189 0.150 0.050 – 0.228 0.010 0.016 0° 8 M45PE20 Max. 0.069 0.010 0.020 0.010 0.197 0.157 – 0.244 0.020 0.035 8° 0.004 31/35 ...

Page 32

... M45PE20 Figure 26. MLP8, 8-lead Very thin Dual Flat Package No lead, 6x5mm, Package Outline Note: Drawing is not to scale. Table 14. MLP8, 8-lead Very thin Dual Flat Package No lead, 6x5mm, Package Mechanical Data Symb. Typ 0.65 A3 0.20 b 0.40 D 6.00 D1 5.75 D2 3.40 E 5. ...

Page 33

... Lead-Free, RoHS compliant, Sb Note: 1. Available for SO8 package only 2. Available for MLP package only For a list of available options (speed, package, etc.) or for further information on any aspect of this M45PE20 – O -free and TBBA-free 2 3 device, please contact your nearest ST Sales Of- fice. M45PE20 33/35 ...

Page 34

... M45PE20 REVISION HISTORY Table 16. Document Revision History Date Version 30-Apr-2003 1.0 Document written Description corrected of entering Hardware Protected mode (W must be driven, and 04-Jun-2003 1.1 cannot be left unconnected 04-Dec-2003 1.2 about exposed paddle on MLP8, and Pb-free options added. Change of naming for VDFPN8 package Soldering temperature information clarified for RoHS compliant devices ...

Page 35

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com M45PE20 35/35 ...

Page 36

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