SST25VF040B-50-4I-QAF Microchip Technology, SST25VF040B-50-4I-QAF Datasheet - Page 7
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SST25VF040B-50-4I-QAF
Manufacturer Part Number
SST25VF040B-50-4I-QAF
Description
IC FLASH SER 4MB 50MHZ SPI 8WSON
Manufacturer
Microchip Technology
Datasheets
1.SST25VF512A-33-4C-SAE.pdf
(2 pages)
2.SST25VF040B-80-4I-SAE.pdf
(33 pages)
3.SST25VF040B-80-4I-QAE.pdf
(33 pages)
Specifications of SST25VF040B-50-4I-QAF
Memory Type
FLASH
Memory Size
4M (512K x 8)
Operating Temperature
-40°C ~ 85°C
Package / Case
8-WSON
Format - Memory
FLASH
Speed
50MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Architecture
Sectored
Interface Type
SPI
Access Time
50 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
32 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
A Microchip Technology Company
©2011 Silicon Storage Technology, Inc.
Status Register
Busy
Write Enable Latch (WEL)
The software status register provides status on whether the flash memory array is available for any
Read or Write operation, whether the device is Write enabled, and the state of the Memory Write pro-
tection. During an internal Erase or Program operation, the status register may be read only to deter-
mine the completion of an operation in progress. Table 3 describes the function of each bit in the
software status register.
Table 3: Software Status Register
The Busy bit determines whether there is an internal Erase or Program operation in progress. A “1” for
the Busy bit indicates the device is busy with an operation in progress. A “0” indicates the device is
ready for the next valid operation.
The Write-Enable-Latch bit indicates the status of the internal memory Write Enable Latch. If the
Write-Enable-Latch bit is set to “1”, it indicates the device is Write enabled. If the bit is set to “0” (reset),
it indicates the device is not Write enabled and does not accept any memory Write (Program/Erase)
commands. The Write-Enable-Latch bit is automatically reset under the following conditions:
Bit
0
1
2
3
4
5
6
7
Name
BUSY
WEL
BP0
BP1
BP2
BP3
AAI
BPL
•
•
•
•
•
•
•
•
Power-up
Write-Disable (WRDI) instruction completion
Byte-Program instruction completion
Auto Address Increment (AAI) programming is completed or reached its highest unpro-
tected memory address
Sector-Erase instruction completion
Block-Erase instruction completion
Chip-Erase instruction completion
Write-Status-Register instructions
Function
1 = Internal Write operation is in progress
0 = No internal Write operation is in progress
1 = Device is memory Write enabled
0 = Device is not memory Write enabled
Indicate current level of block write protection (See Table 4)
Indicate current level of block write protection (See Table 4)
Indicate current level of block write protection (See Table 4)
Indicate current level of block write protection (See Table 4)
Auto Address Increment Programming status
1 = AAI programming mode
0 = Byte-Program mode
1 = BP3, BP2, BP1, BP0 are read-only bits
0 = BP3, BP2, BP1, BP0 are read/writable
7
4 Mbit SPI Serial Flash
Default at
Power-up
SST25VF040B
0
0
1
1
1
0
0
0
S71295-06-000
Read/Write
Data Sheet
R/W
R/W
R/W
R/W
R/W
R
R
R
T3.0 1295
02/11