MT47H32M16BT-3:A TR Micron Technology Inc, MT47H32M16BT-3:A TR Datasheet - Page 106
MT47H32M16BT-3:A TR
Manufacturer Part Number
MT47H32M16BT-3:A TR
Description
IC DDR2 SDRAM 512MBIT 3NS 92FBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H128M4BT-37EA_TR.pdf
(129 pages)
Specifications of MT47H32M16BT-3:A TR
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
512M (32Mx16)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
92-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1048-1
MT47H32M16BT-3:A
MT47H32M16BT-3:A
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Figure 62: Bank Write – Without Auto Precharge
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. O 7/09 EN
Bank select
DQS, DQS#
Command
Address
DQ 6
CK#
CKE
A10
DM
CK
NOP 1
T0
Notes:
Bank x
ACT
RA
RA
T1
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 and AL = 0 in the case shown.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T9.
5. Subsequent rising DQS signals must align to the clock within
6. DI n = data-in for column n; subsequent elements are applied in the programmed order.
7.
8.
t CK
these times.
t
t
DSH is applicable during
DSS is applicable during
t RCD
NOP 1
T2
t CH
t CL
WRITE 2
Bank x
Col n
3
T3
WL ± t DQSS (NOM)
WL = 2
NOP 1
t
106
T4
t
DQSS (MAX) and is referenced from CK T6 or T7.
DQSS (MIN) and is referenced from CK T5 or T6.
t WPRE
NOP 1
T5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
DI
n
512Mb: x4, x8, x16 DDR2 SDRAM
T5n
t DQSL t DQSH t WPST
t RAS
NOP 1
5
T6
T6n
Transitioning Data
NOP 1
T7
©2004 Micron Technology, Inc. All rights reserved.
t
DQSS.
t WR
NOP 1
T8
One bank
All banks
Don’t Care
Bank x 4
T9
PRE
WRITE
t RP
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