AT45DB041D-SU Atmel, AT45DB041D-SU Datasheet - Page 16

• Manufacturer Part Number: AT45DB041D-SU
• Description: IC FLASH 4MBIT 66MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT45DB041D-SU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 4M (2048 pages x 264 bytes)
• Speed: 66MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Density: 4Mb
• Access Time (max): 6ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC EIAJ
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 15mA
• Mounting: Surface Mount
• Pin Count: 8
• Architecture: Sectored
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 15 mA
• Mounting Style: SMD/SMT
• Organization: 264 B
• Current, Input, Leakage: 1 μA
• Current, Operating: 10 mA (Read), 12 mA (Program/Erase)
• Current, Output, Leakage: 1
• Data Retention: 20 yrs.
• Temperature, Operating: -40 to +85 °C
• Time, Access: 6 ns
• Time, Address Hold: 5
• Time, Address Setup: 5
• Time, Fall: 6.8 ns
• Time, Rise: 6.8 ns
• Voltage, Input, High: 1.89 to 2.52 V
• Voltage, Input, Low: 0.81 to 1.08 V
• Voltage, Output, High: 2.5 to 3.4 V
• Voltage, Output, Low: 0.4 V
• Voltage, Supply: 2.7 to 3.6 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.1.2
Figure 9-3.
16
CS
SI
AT45DB041D
Program Sector Protection Register Command
Program Sector Protection Register
Each transition
represents 8 bits
Opcode
Byte 1
Once the Sector Protection Register has been erased, it can be reprogrammed using the
Program Sector Protection Register command.
To program the Sector Protection Register, the CS pin must first be asserted and the appropri-
ate 4-byte opcode sequence must be clocked into the device via the SI pin. The 4-byte opcode
sequence must start with 3DH and be followed by 2AH, 7FH, and FCH. After the last bit of the
opcode sequence has been clocked into the device, the data for the contents of the Sector Pro-
tection Register must be clocked in. As described in
contains 8 bytes of data, so 8 bytes must be clocked into the device. The first byte of data corre-
sponds to sector 0, the second byte corresponds to sector 1, and so on with the last byte of data
corresponding to sector 7.
After the last data byte has been clocked in, the CS pin must be deasserted to initiate the inter-
nally self-timed program cycle. The programming of the Sector Protection Register should take
place in a time of t
the device is powered-down during the program cycle, then the contents of the Sector Protection
Register cannot be guaranteed.
If the proper number of data bytes is not clocked in before the CS pin is deasserted, then the
protection status of the sectors corresponding to the bytes not clocked in can not be guaranteed.
For example, if only the first two bytes are clocked in instead of the complete 8 bytes, then the
protection status of the last 6 sectors cannot be guaranteed. Furthermore, if more than 8 bytes
of data is clocked into the device, then the data will wrap back around to the beginning of the
register. For instance, if 9 bytes of data are clocked in, then the 9th byte will be stored at byte
location 0 of the Sector Protection Register.
If a value other than 00H or FFH is clocked into a byte location of the Sector Protection Register,
then the protection status of the sector corresponding to that byte location cannot be guaran-
teed. For example, if a value of 17H is clocked into byte location 2 of the Sector Protection
Register, then the protection status of sector 2 cannot be guaranteed.
The Sector Protection Register can be reprogrammed while the sector protection enabled or dis-
abled. Being able to reprogram the Sector Protection Register with the sector protection enabled
allows the user to temporarily disable the sector protection to an individual sector rather than
disabling sector protection completely.
The Program Sector Protection Register command utilizes the internal SRAM buffer 1 for
processing. Therefore, the contents of the buffer 1 will be altered from its previous state when
this command is issued.
Command
Program Sector Protection Register
Opcode
Byte 2
P
, during which time the Status Register will indicate that the device is busy. If
Opcode
Byte 3
Opcode
Byte 4
Data Byte
Byte 1
n
3DH
Data Byte
Section
n + 1
Byte 2
2AH
9.1, the Sector Protection Register
Data Byte
Byte 3
n + 7
7FH
3595P–DFLASH–09/09
Byte 4
FCH