MT47H64M8CB-3:B Micron Technology Inc, MT47H64M8CB-3:B Datasheet - Page 84
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MT47H64M8CB-3:B
Manufacturer Part Number
MT47H64M8CB-3:B
Description
IC DDR2 SDRAM 512MBIT 3NS 60FBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H64M8CB-5EB.pdf
(133 pages)
Specifications of MT47H64M8CB-3:B
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
512M (64M x 8)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
60-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H64M8CB-3:B
Manufacturer:
MICRON
Quantity:
12 388
Company:
Part Number:
MT47H64M8CB-3:B
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Company:
Part Number:
MT47H64M8CB-3:B TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
AC and DC Operating Conditions
Table 20:
Table 21:
PDF: 09005aef8117c18e, Source: 09005aef8211b2e6
512MbDDR2_2.fm - Rev. K 8/06 EN
Parameter
Parameter
Supply voltage
V
I/O supply voltage
I/O reference voltage
I/O termination voltage (system)
R
EMR (A6, A2) = 0, 1
R
EMR (A6, A2) = 1, 0
R
EMR (A6, A2) = 1, 1
Deviation of VM with respect to V
TT
TT
TT
DD
effective impedance value for 75
effective impedance value for 150
effective impedance value for 50
L supply voltage
Recommended DC Operating Conditions (SSTL_18)
All voltages referenced to V
ODT DC Electrical Characteristics
All voltages referenced to V
Notes:
Notes:
1. V
2. V
3. V
4. V
5. V
1. R
2. Measure voltage (VM) at tested ball with no load.
3. IT device minimum values are derated by six percent when device operates between –40°C
DC level of the same. Peak-to-peak noise (non-common mode) on V
percent of the DC value. Peak-to-peak AC noise on V
V
tors, is expected to be set equal to V
being tested, and then measuring current, I(V
and 0°C (T
TT
DD
REF
REF
TT
DD
SS
DD
Q = V
1(
is not applied directly to the device. V
Q tracks with V
(
and V
is expected to equal V
DC
EFF
Ω
Ω
Q/2
Ω
). This measurement is to be taken at the nearest V
) and R
setting
setting
SS
setting
C
SS
DD
L = V
SS
R
).
TT EFF
Q must track each other. V
TT
(
SS
ΔVM
Symbol
V
2(
V
.
REF
V
V
V
DD
EFF
DD
DD
)
DD
TT
(
DC
Q
) are determined by separately applying V
L
=
=
; V
)
⎛
⎝
-------------------------------------------------------------
I V
DD
2 VM
----------------- - 1
(
V
×
DD
L tracks with V
DD
V
IH AC
84
IH AC
V
0.49 x V
Q
Q/2 of the transmitting device and to track variations in the
(
REF
R
R
R
Symbol
(
–
TT
TT
TT
Min
ΔVM
(
)
1.7
1.7
1.7
DC
1(
2(
3(
) I V
⎞
⎠
) V
–
–
×
) - 40
EFF
EFF
EFF
REF
DD
100
(
IL AC
Micron Technology, Inc., reserves the right to change products or specifications without notice.
)
)
)
, and must track variations in the DC level of V
DD
Q
(
IL AC
DD
Q must be ≤ V
TT
(
.
Min
is a system supply for signal termination resis-
)
120
0.50 x V
60
40
–6
512Mb: x4, x8, x16 DDR2 SDRAM
AC and DC Operating Conditions
IH
V
)
(
)
Nom
REF
AC
1.8
1.8
1.8
)), and I(V
(
DC
DD
REF
)
Nom
150
Q
75
50
DD
may not exceed ±2 percent of
REF
.
V
IL
0.51
REF
bypass capacitor.
(
AC
IH
©2004 Micron Technology, Inc. All rights reserved.
Max
(
)), respectively.
1.9
1.9
1.9
(
DC
X
Max
AC
180
90
60
V
) + 40
6
REF
) and V
DD
Q
may not exceed ±1
Units
IL
Units
(
mV
%
Ω
Ω
Ω
AC
V
V
V
V
) to the ball
Notes
Notes
1, 3
1, 3
1, 3
4, 5
4, 5
1, 5
REF
2
3
2
.