MT48LC16M8A2TG-75 L:G Micron Technology Inc, MT48LC16M8A2TG-75 L:G Datasheet - Page 67

• Manufacturer Part Number: MT48LC16M8A2TG-75 L:G
• Description: IC SDRAM 128MBIT 133MHZ 54TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT48LC16M8A2TG-75 L:G

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 128M (16M x 8)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-TSOP II
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 51:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMU
COMMAND
A0–A9, A11
BA0, BA1
DQM /
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
Single WRITE – Without Auto Precharge
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
1. For this example, BL = 1, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 15ns is required between <D
3. x16: A9 and A11 = “Don’t Care.”
NOP
x8: A11 = “Don’t Care.”
DISABLE AUTO PRECHARGE
t CMS
t CL
t DS
COLUMN m 3
WRITE
BANK
T2
D
IN
t CMH
t CH
t DH
m
t WR
4
NOP 2
T3
67
IN
m> and the PRECHARGE command, regardless of frequency.
NOP 2
T4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
PRECHARGE
SINGLE BANK
ALL BANKS
T5
BANK
t RP
128Mb: x4, x8, x16 SDRAM
NOP
T6
©1999 Micron Technology, Inc. All rights reserved.
ACTIVE
BANK
ROW
T7
Timing Diagrams
NOP
T8
DON’T CARE