MT48LC8M8A2TG-7E L:G Micron Technology Inc, MT48LC8M8A2TG-7E L:G Datasheet - Page 68

IC SDRAM 64MBIT 133MHZ 54TSOP

MT48LC8M8A2TG-7E L:G

Manufacturer Part Number
MT48LC8M8A2TG-7E L:G
Description
IC SDRAM 64MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC8M8A2TG-7E L:G

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (8M x 8)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 51:
DQML, DQMH
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
COMMAND
A0–A9, A11
BA0, BA1
DQM /
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
BANK 0
T0
ROW
ROW
Alternating Write Accesses
t CKH
t CMH
t AH
t AH
t AH
Notes:
t RCD - BANK 0
t RAS - BANK 0
t
t
RC - BANK 0
RRD
t CK
T1
NOP
1. For this example, BL = 4.
2. x16: A8, A9 and A11 = “Don’t Care”
ENABLE AUTO PRECHARGE
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
t CMS
t CL
t DS
COLUMN m 2
BANK 0
WRITE
T2
D
IN
t CMH
t CH
t DH
m
t DS
D
IN
T3
NOP
m + 1
t DH
t DS
D
ACTIVE
BANK 1
IN
T4
ROW
ROW
m + 2
68
t DH
t RCD - BANK 1
t DS
D
IN
T5
NOP
m + 3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DH
t WR - BANK 0
ENABLE AUTO PRECHARGE
t DS
COLUMN b 2
BANK 1
WRITE
T6
D
IN
t DH
b
64Mb: x4, x8, x16 SDRAM
t DS
D
t RP - BANK 0
NOP
IN
T7
b + 1
t DH
©2000 Micron Technology, Inc. All rights reserved.
t DS
Timing Diagrams
D
IN
NOP
T8
b + 2
t DH
t DS
D
BANK 0
ACTIVE
IN
T9
ROW
ROW
b + 3
t
t
RCD - BANK 0
WR - BANK 1
t DH
DON’T CARE

Related parts for MT48LC8M8A2TG-7E L:G