CY7C1019CV33-12VC Cypress Semiconductor Corp, CY7C1019CV33-12VC Datasheet - Page 3

• Manufacturer Part Number: CY7C1019CV33-12VC
• Description: IC SRAM 1MBIT 12NS 32SOJ
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1019CV33-12VC

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 1M (128K x 8)
• Speed: 12ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-SOJ
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1476

Document #: 38-05130 Rev. *D
AC Test Loads and Waveforms
Switching Characteristics
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
Notes:
Parameter
10. The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum of t
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
4.
5.
6.
7.
8.
9.
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
[8]
[8]
8-ns devices:
AC characteristics (except High-Z) for all 8-ns parts are tested using the load conditions shown in Figure (a). All other speeds are tested using the Thevenin
load shown in Figure (b). High-Z characteristics are tested for all speeds using the test load shown in Figure (d).
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V.
t
At any given temperature and voltage condition, t
This parameter is guaranteed by design and is not tested.
The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. CE and WE must be LOW to initiate a write, and the transition of any of these
signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
HZOE
GND
3.0V
Rise Time: 1 V/ns
, t
HZCE
OUTPUT
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
[9, 10]
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
, and t
HZWE
are specified with a load capacitance of 5 pF as in part (d) of AC Test Loads. Transition is measured 500 mV from steady-state voltage.
Description
10%
Z = 50
90%
[7]
ALL INPUT PULSES
[6, 7]
[7]
[6, 7]
[6, 7]
[5]
(a)
Over the Operating Range
(c)
1.5V
50
[4]
HZCE
is less than t
7C1019CV33-8 7C1019CV33-10 7C1019CV33-12 7C1019CV33-15
Fall Time: 1 V/ns
Min.
90%
30pF*
8
3
0
3
8
7
7
0
0
6
5
0
3
0
10%
LZCE
Max.
, t
HZOE
8
8
5
4
4
8
4
is less than t
Min.
10
10
3
0
3
0
8
8
0
0
7
5
0
3
10-, 12-, 15-ns devices:
High-Z characteristics:
LZOE
OUTPUT
OUTPUT
, and t
HZWE
Max.
10
10
10
5
5
5
5
3.3V
3.3V
HZWE
and t
is less than t
SD
30 pF
Min.
.
5 pF
12
12
3
0
3
0
9
9
0
0
8
6
0
3
(d)
(b)
LZWE
R 317
R 317
Max.
12
12
12
6
6
6
6
for any given device.
CY7C1019CV33
351
351
Min.
R2
R2
15
15
10
10
10
3
0
3
0
0
0
8
0
3
Max.
15
15
15
Page 3 of 8
7
7
7
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns