PSD813F1A-90U STMicroelectronics, PSD813F1A-90U Datasheet - Page 96

• Manufacturer Part Number: PSD813F1A-90U
• Description: IC FLASH 1MBIT 90NS 80TQFP
• Manufacturer: STMicroelectronics

Specifications of PSD813F1A-90U

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 1M (128K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-1979

PSD813F1A
Figure 50. Peripheral I/O WRITE Timing
Table 65. Port A Peripheral Data Mode WRITE Timing (5V devices)
Note: 1. RD has the same timing as DS, LDS, UDS, and PSEN (in 8031 combined mode).
Table 66. Port A Peripheral Data Mode WRITE Timing (3V devices)
Note: 1. RD has the same timing as DS, LDS, UDS, and PSEN (in 8031 combined mode) signals.
96/111
t
t
t
t
t
t
WLQV–PA
DVQV–PA
WHQZ–PA
WLQV–PA
DVQV–PA
WHQZ–PA
Symbol
Symbol
2. WR has the same timing as the E, LDS, UDS, WRL, and WRH signals.
3. Any input used to select Port A Data Peripheral mode.
4. Data is already stable on Port A.
5. Data stable on ADIO pins to data on Port A.
2. WR has the same timing as the E, LDS, UDS, WRL, and WRH signals.
3. Any input used to select Port A Data Peripheral mode.
4. Data is already stable on Port A.
5. Data stable on ADIO pins to data on Port A.
WR to Data Propagation Delay
Data to Port A Data Propagation Delay
WR Invalid to Port A Tri-state
WR to Data Propagation Delay
Data to Port A Data Propagation Delay
WR Invalid to Port A Tri-state
A / D BUS
ALE/AS
WR
Parameter
Parameter
ADDRESS
Conditions
tWLQV
(Note
(Note
(Note
Conditions
(Note
(Note
(Note
2
5
2
(PA)
)
)
)
2
5
2
)
)
)
tDVQV (PA)
DATA OUT
Min Max Min Max Min Max
DATA OUT
PORT A
-90
Min
35
30
25
-15
Max
tWHQZ (PA)
45
40
33
-12
38
35
30
Min
AI02898
-20
-15
Max
55
45
35
40
38
33
Unit
Unit
ns
ns
ns
ns
ns
ns