M45PE80-VMW6TG NUMONYX, M45PE80-VMW6TG Datasheet - Page 22

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M45PE80-VMW6TG

Manufacturer Part Number
M45PE80-VMW6TG
Description
IC FLASH 8MBIT 25MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheets

Specifications of M45PE80-VMW6TG

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
8M (1M x 8)
Speed
25MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M45PE80-VMW6TG
M45PE80-VMW6TGTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M45PE80-VMW6TG
Manufacturer:
STMicroelectronics
Quantity:
20 000
Part Number:
M45PE80-VMW6TG
Manufacturer:
ST
Quantity:
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Part Number:
M45PE80-VMW6TG
0
Company:
Part Number:
M45PE80-VMW6TG
Quantity:
73
Part Number:
M45PE80-VMW6TG=M45PE80-VMW6G
Manufacturer:
ST
0
Part Number:
M45PE80-VMW6TGCT
Manufacturer:
ST
0
6.6
22/48
Figure 10. Read Data Bytes (READ) instruction sequence and data-out sequence
1. Address bits A23 to A20 are Don’t Care.
Read Data Bytes at Higher Speed (FAST_READ)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Data Bytes at Higher Speed (FAST_READ) instruction is followed by a 3-byte address (A23-
A0) and a dummy byte, each bit being latched-in during the rising edge of Serial Clock (C).
Then the memory contents, at that address, is shifted out on Serial Data Output (Q), each
bit being shifted out, at a maximum frequency f
The instruction sequence is shown in
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out. The whole memory can,
therefore, be read with a single Read Data Bytes at Higher Speed (FAST_READ)
instruction. When the highest address is reached, the address counter rolls over to
000000h, allowing the read sequence to be continued indefinitely.
The Read Data Bytes at Higher Speed (FAST_READ) instruction is terminated by driving
Chip Select (S) High. Chip Select (S) can be driven High at any time during data output. Any
Read Data Bytes at Higher Speed (FAST_READ) instruction, while an Erase, Program or
Write cycle is in progress, is rejected without having any effects on the cycle that is in
progress.
S
C
D
Q
0
1
High Impedance
2
Instruction
3
4
5
6
7
MSB
23
8
22 21
9 10
Figure
24-Bit Address
11.
3
28 29 30 31 32 33 34 35
C
, during the falling edge of Serial Clock (C).
2
1
0
MSB
7
6
5
Data Out 1
4
3
36 37 38
2
1
0
39
Data Out 2
7
AI03748D

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