MD8331-D2G-V3-X-P/Y SanDisk, MD8331-D2G-V3-X-P/Y Datasheet - Page 80
MD8331-D2G-V3-X-P/Y
Manufacturer Part Number
MD8331-D2G-V3-X-P/Y
Description
IC MDOC G4 2GB 69-FBGA
Manufacturer
SanDisk
Datasheet
1.MD8832-D1G-V18-X-P.pdf
(85 pages)
Specifications of MD8331-D2G-V3-X-P/Y
Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
2G (256M x 8)
Speed
33ns
Interface
Parallel
Voltage - Supply
2.5 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
69-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MD8831-D2G-V3-X-P/Y
MD8831-D2G-V3-X-P/Y
MD8832-D2G-V3-X-P/Y
MD8832-D2G-V3-X-P/Y
MD8831-D2G-V3-X-P/Y
MD8832-D2G-V3-X-P/Y
MD8832-D2G-V3-X-P/Y
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
1.
2.
3.
80
(Muxed Mode Only)
Specified from the final positive crossing of VCC above 1.65V and VCCQ above 1.65.
Normal read/write cycle timing applies. This parameter applies only when the cycle is extended until the negation of the BUSY# signal.
If the assertion of RSTIN# occurs during a flash erase cycle, this time could be extended by up to 500 µS.
T
operating specifications
Tsu (RSTIN-AVD)
Tsu (DPD-AVD)
D (Read cycle)
T
VCC & VCCQ within
REC
T
Tp (RSTIN-D)
Trise (RSTIN)
P
T
SU
T
T
T
DPD (A[0])
P
(VCC-BUSY0)
(WE# = 1)
CE#, OE#
P
P
W
Symbol
(VCC-RSTIN)
(DPD-D)
(D-BUSY1)
RSTIN#
BUSY#
A[12:0]
(BUSY0)
(BUSY1)
(RSTIN)
AVD#
VCC
5,6
5
7
4,6
4
VCC/VCCQ stable to RSTIN#
RSTIN# asserted pulse width
RSTIN#
RSTIN#
Data valid to BUSY#
VCC/VCCQ stable to BUSY#
RSTIN#
DPD transition to AVD#
RSTIN#
DPD transition to Data valid
RSTIN# rise time
T
P
Table 16: Power-Up Timing Parameters
(VCC-BUSY0)
T
REC
T
SU
Data Sheet (Preliminary) Rev. 0.3
(VCC-RSTIN)
(RSTIN-AVD)
T
T
P
Figure 25: Reset Timin g
SU
T
(RSTIN-D)
P
to BUSY#
to BUSY#
to AVD#
to Data valid
(DPD-AVD)
(DPD-D)
Description
7
4
2
T
3
P
(BUSY1)
4,6
5,6
1
T
VALID
SU
DiskOnChip G4 128MB (1Gb)/256MB (2Gb) 1.8V
(D-BUSY1)
Min
500
600
700
4.2
4.4
50
0
T
P
Max
(BUSY0)
500
6.1
T
50
10
20
W
(RSTIN)
92-DS-1105-00
Units
ms
µs
ns
ns
ns
µs
µs
ns
µs
ns
ns