ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 74

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7878
Table 25. Internal DSP Memory RAM Registers
Address
0xE203
0xE228
1
2
Table 26. Billable Registers
Address
0xE400
0xE401
0xE402
0xE403
0xE404
0xE405
0xE406
0xE407
0xE408
0xE409
0xE40A
0xE40B
0xE40C
0xE40D
0xE40E
1
2
Table 27. Configuration and Power Quality Registers
Address
0xE500
0xE501
0xE502
0xE503
0xE504
R is read and W is write.
U is an unsigned register and S is a signed register in twos complement format.
R is read and W is write.
U is an unsigned register and S is a signed register in twos complement format.
Name
Reserved
Run
Register
Name
AWATTHR
BWATTHR
CWATTHR
AFWATTHR
BFWATTHR
CFWATTHR
AVARHR
BVARHR
CVARHR
AFVARHR
BFVARHR
CFVARHR
AVAHR
BVAHR
CVAHR
Name
IPEAK
VPEAK
STATUS0
STATUS1
AIMAV
R/W
R/W
R/W
1
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R/W
R
R
R
R
R
16
Bit
Length
16
1
1
Bit
Length
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Bit
Length
32
32
32
20
Bit Length During
Communication
16
16
Bit Length
During
Communication
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Bit Length During
Communication
32
32
32
32
32 ZP
Rev. 0 | Page 74 of 92
Type
U
U
2
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
Type
2
Default
Value
0x0000
0x0000
2
Type
U
U
U
U
U
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Default
Value
0x00000000
0x00000000
0x00000000
0x00000000
3
N/A
N/A
Default
Value
N/A
N/A
N/A
This memory location should not be written for
The run register starts and stops the DSP. See the
Description
proper operation.
Digital Signal Processor section for more details.
4
Description
Phase A total active energy accumulation.
Phase B total active energy accumulation.
Phase C total active energy accumulation.
Phase A fundamental active energy
accumulation.
Phase B fundamental active energy
accumulation.
Phase C fundamental active energy
accumulation.
Phase A total reactive energy accumulation.
Phase B total reactive energy accumulation.
Phase C total reactive energy accumulation.
Phase A fundamental reactive energy
accumulation.
Phase B fundamental reactive energy
accumulation.
Phase C fundamental reactive energy
accumulation.
Phase A apparent energy accumulation.
Phase B apparent energy accumulation.
Phase C apparent energy accumulation.
Description
Current peak register. See Figure 47
and Table 29 for details about its
composition.
Voltage peak register. See Figure 47
and Table 30 for details about its
composition.
Interrupt Status Register 0. See Table 31.
Interrupt Status Register 1. See Table 32.
Phase A current mean absolute value
computed during PSM0 and PSM1
modes.