PCA9531D,112 NXP Semiconductors, PCA9531D,112 Datasheet

IC LED DRIVER RGB 16-SOIC

PCA9531D,112

Manufacturer Part Number
PCA9531D,112
Description
IC LED DRIVER RGB 16-SOIC
Manufacturer
NXP Semiconductors
Type
RGB LED Driverr
Datasheet

Specifications of PCA9531D,112

Topology
Open Drain, PWM
Number Of Outputs
8
Internal Driver
Yes
Type - Primary
Backlight, LED Blinker
Type - Secondary
RGB
Frequency
400kHz
Voltage - Supply
2.3 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 85°C
Current - Output / Channel
25mA
Internal Switch(s)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4003 - DEMO BOARD LED DIMMER568-3615 - DEMO BOARD I2C
Voltage - Output
-
Efficiency
-
Lead Free Status / Rohs Status
 Details
Other names
568-3369-5
935274731112
PCA9531D
1. General description
2. Features
The PCA9531 is an 8-bit I
256 discrete steps for Red/Green/Blue (RGB) color mixing and back light applications.
The PCA9531 contains an internal oscillator with two user programmable blink rates and
duty cycles coupled to the output PWM. The LED brightness is controlled by setting the
blink rate high enough (> 100 Hz) that the blinking cannot be seen and then using the duty
cycle to vary the amount of time the LED is on and thus the average current through the
LED.
The initial setup sequence programs the two blink rates/duty cycles for each individual
PWM. From then on, only one command from the bus master is required to turn individual
LEDs ON, OFF, BLINK RATE 1 or BLINK RATE 2. Based on the programmed frequency
and duty cycle, BLINK RATE 1 and BLINK RATE 2 will cause the LEDs to appear at a
different brightness or blink at periods up to 1.69 second. The open-drain outputs directly
drive the LEDs with maximum output sink current of 25 mA per bit and 100 mA per
package.
To blink LEDs at periods greater than 1.69 second the bus master (MCU, MPU, DSP,
chip set, etc.) must send repeated commands to turn the LED on and off as is currently
done when using normal I/O expanders like the NXP Semiconductors PCF8574 or
PCA9554. Any bits not used for controlling the LEDs can be used for General Purpose
parallel Input/Output (GPIO) expansion, which provides a simple solution when additional
I/O is needed for ACPI power switches, sensors, push-buttons, alarm monitoring, fans,
etc.
The active LOW hardware reset pin (RESET) and Power-On Reset (POR) initializes the
registers to their default state causing the bits to be set HIGH (LED off).
Three hardware address pins on the PCA9531 allow eight devices to operate on the same
bus.
I
I
I
I
I
I
I
PCA9531
8-bit I
Rev. 06 — 19 February 2009
Eight LED drivers (on, off, flashing at a programmable rate)
Two selectable, fully programmable blink rates (frequency and duty cycle) between
0.59 Hz and 152 Hz (1.69 second and 6.58 milliseconds)
256 brightness steps
Input/outputs not used as LED drivers can be used as regular GPIOs
Internal oscillator requires no external components
I
Internal power-on reset
2
C-bus interface logic compatible with SMBus
2
C-bus LED dimmer
2
C-bus and SMBus I/O expander optimized for dimming LEDs in
Product data sheet

Related parts for PCA9531D,112

PCA9531D,112 Summary of contents

Page 1

... To blink LEDs at periods greater than 1.69 second the bus master (MCU, MPU, DSP, chip set, etc.) must send repeated commands to turn the LED on and off as is currently done when using normal I/O expanders like the NXP Semiconductors PCF8574 or PCA9554. Any bits not used for controlling the LEDs can be used for General Purpose ...

Page 2

... NXP Semiconductors I Noise filter on SCL/SDA inputs I Active LOW reset input I Eight open-drain outputs directly drive LEDs Edge rate control on outputs I No glitch on power-up I Supports hot insertion I Low standby current I Operating power supply voltage range 400 kHz clock frequency I ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per ...

Page 3

... NXP Semiconductors 4. Block diagram PCA9531 SCL INPUT FILTERS SDA V DD POWER-ON RESET RESET OSCILLATOR V SS Only one I/O shown for clarity. Fig 1. Block diagram of PCA9531 PCA9531_6 Product data sheet C-BUS CONTROL PRESCALER 0 REGISTER PRESCALER 1 REGISTER Rev. 06 — 19 February 2009 PCA9531 2 8-bit I ...

Page 4

... NXP Semiconductors 5. Pinning information 5.1 Pinning LED0 LED1 LED2 LED3 Fig 2. Fig 4. 5.2 Pin description Table 2. Symbol LED0 LED1 LED2 LED3 PCA9531_6 Product data sheet SDA SCL 4 13 RESET PCA9531D 5 12 LED7 6 11 LED6 7 10 LED5 LED4 SS 002aac518 Pin configuration for SO16 ...

Page 5

... NXP Semiconductors Table 2. Symbol V SS LED4 LED5 LED6 LED7 RESET SCL SDA V DD [1] HVQFN16 package die supply ground is connected to both V be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the PCB in the thermal pad region ...

Page 6

... NXP Semiconductors 6.2 Control register Following the successful acknowledgement of the slave address, the bus master will send a byte to the PCA9531, which will be stored in the Control register. Fig 6. The lowest 3 bits are used as a pointer to determine which register will be accessed. If the Auto-Increment flag is set, the three low order bits of the Control register are automatically incremented after a read or write. This allows the user to program the registers sequentially. The contents of these bits will rollover to ‘ ...

Page 7

... NXP Semiconductors 6.3.2 PCS0 - Frequency Prescaler 0 PSC0 is used to program the period of the PWM output. The period of BLINK0 = (PSC0 + 1) / 152. Table 5. Bit Symbol Default 6.3.3 PWM0 - Pulse Width Modulation 0 The PWM0 register determines the duty cycle of BLINK0. The outputs are LOW (LED on) when the count is less than the value in PWM0 and HIGH (LED off) when it is greater ...

Page 8

... NXP Semiconductors 6.3.6 LS0 to LS1 - LED selector registers The LSn LED select registers determine the source of the LED data output is set high-impedance (LED off; default output is set LOW (LED on output blinks at PWM0 rate 11 = output blinks at PWM1 rate Table 9. Legend: * default value. ...

Page 9

... NXP Semiconductors 7. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...

Page 10

... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 9. System configuration 7.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...

Page 11

... NXP Semiconductors 7.4 Bus transactions SCL slave address SDA START condition write to register data out from port Fig 11. Write to register slave address SDA START condition acknowledge slave address (cont (repeated) START condition Fig 12. Read from register slave address SDA START condition ...

Page 12

... NXP Semiconductors 8. Application design-in information 3 C-BUS/SMBus MASTER Fig 14. Typical application 8.1 Minimizing I When the I/Os are used to control LEDs, they are normally connected to V resistor as shown in I about 1.2 V less than V I lower than V Designs needing to minimize current consumption, such as battery power applications, ...

Page 13

... NXP Semiconductors 8.2 Programming example The following example will show how to set LED0 to LED3 on. It will then set LED4 and LED5 to blink duty cycle. LED6 and LED7 will be set to be dimmed their maximum brightness (duty cycle = 25 %). Table 10. Program sequence START PCA9531 address with LOW ...

Page 14

... NXP Semiconductors 10. Static characteristics Table 12. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb I additional quiescent supply DD current V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current ...

Page 15

... NXP Semiconductors 20 % (1) percent variation (1) maximum (2) average (3) minimum Fig 17. Typical frequency variation over process 2 3 PCA9531_6 Product data sheet 002aac524 20 % percent variation 100 amb (1) maximum (2) average (3) minimum Fig 18. Typical frequency variation over process at Rev. 06 — 19 February 2009 PCA9531 2 8-bit I C-bus LED dimmer ...

Page 16

... NXP Semiconductors 11. Dynamic characteristics Table 13. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START condition HD;STA t set-up time for a repeated START SU;STA condition t set-up time for STOP condition SU;STO ...

Page 17

... NXP Semiconductors START SCL SDA RESET 50 % LEDn Fig 19. Definition of RESET timing SDA t BUF t LOW SCL t HD;STA P S Fig 20. Definition of timing PCA9531_6 Product data sheet rec(rst HD;DAT HIGH SU;DAT Rev. 06 — 19 February 2009 PCA9531 2 8-bit I C-bus LED dimmer ACK or read cycle ...

Page 18

... NXP Semiconductors protocol SCL SDA Fig 21. I 12. Test information Fig 22. Test circuitry for switching times PCA9531_6 Product data sheet START bit 7 bit 6 condition MSB (A6) (S) (A7 SU;STA LOW HIGH 1 /f SCL t t BUF SU;DAT HD;STA Rise and fall times refer to V and V ...

Page 19

... NXP Semiconductors 13. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 20

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 21

... NXP Semiconductors HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.23 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 22

... NXP Semiconductors 14. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 15. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “ ...

Page 23

... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 15.4 Reflow soldering Key characteristics in reflow soldering are: • ...

Page 24

... NXP Semiconductors Fig 26. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 16. Abbreviations Table 16. Acronym CDM DSP DUT ESD GPIO HBM 2 I C-bus LED MCU MM MPU ...

Page 25

... NXP Semiconductors 17. Revision history Table 17. Revision history Document ID Release date PCA9531_6 20090219 • Modifications: Type number PCA9531BS3 is withdrawn, and is deleted from this data sheet – Section 2 – Section 3 “Ordering – Section 5.1 – Section 13 “Package • Table 12 “Static – Max value for I – ...

Page 26

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 27

... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 6.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Control register . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.2.1 Control register definition . . . . . . . . . . . . . . . . . 6 6.3 Register descriptions . . . . . . . . . . . . . . . . . . . . 6 6.3.1 INPUT - Input register ...

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