PCA9532D,112 NXP Semiconductors, PCA9532D,112 Datasheet - Page 10
![IC LED DRIVER RGB 24-SOIC](/photos/6/52/65263/568-24-soic_sot137-1_sml.jpg)
PCA9532D,112
Manufacturer Part Number
PCA9532D,112
Description
IC LED DRIVER RGB 24-SOIC
Manufacturer
NXP Semiconductors
Type
RGB LED Driverr
Datasheet
1.PCA9532BS118.pdf
(29 pages)
Specifications of PCA9532D,112
Package / Case
24-SOIC (7.5mm Width)
Topology
Open Drain, PWM
Number Of Outputs
16
Internal Driver
Yes
Type - Primary
Backlight, LED Blinker
Type - Secondary
RGB
Frequency
400kHz
Voltage - Supply
2.3 V ~ 5.5 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Current - Output / Channel
25mA
Internal Switch(s)
Yes
Low Level Output Current
6.5 mA
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Efficiency
-
Lead Free Status / Rohs Status
Details
Other names
568-1039-5
935272838112
PCA9532D
935272838112
PCA9532D
NXP Semiconductors
7. Characteristics of the I
PCA9532_4
Product data sheet
7.1.1 START and STOP conditions
7.1 Bit transfer
7.2 System configuration
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S).
A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see
Fig 7.
Fig 8.
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
SDA
SCL
Bit transfer
Definition of START and STOP conditions
START condition
2
SDA
SCL
Figure
C-bus
S
Rev. 04 — 17 March 2009
8).
Figure
data valid
data line
stable;
9).
Figure
allowed
change
of data
7).
16-bit I
STOP condition
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2
C-bus LED dimmer
PCA9532
P
© NXP B.V. 2009. All rights reserved.
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