LTC1155CS8 Linear Technology, LTC1155CS8 Datasheet - Page 5

• Manufacturer Part Number: LTC1155CS8
• Description: IC MOSFET DVR HI-SIDE DUAL 8SOIC
• Manufacturer: Linear Technology

Specifications of LTC1155CS8

• Configuration: High-Side
• Input Type: Non-Inverting
• Delay Time: 450µs
• Number Of Configurations: 2
• Number Of Outputs: 2
• Voltage - Supply: 4.5 V ~ 18 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Peak: -
• High Side Voltage - Max (bootstrap): -

PIN
OPERATIO
The supply pin of the LTC1155 should not be forced below
ground as this may result in permanent damage to the
device. A 300 resistor should be inserted in series with
the ground pin if negative supply voltages are anticipated.
Drain Sense Pin
As noted previously, the drain sense pin is compared
against the supply pin voltage. If the voltage at this pin is
more than 100mV below the supply pin, the input latch will
be reset and the MOSFET gate will be quickly discharged.
Cycle the input to reset the short-circuit latch and turn the
MOSFET back on.
BLOCK
The LTC1155 contains two independent power MOSFET
gate drivers and protection circuits (refer to the Block
Diagram for details). Each half of the LTC1155 consists of
the following functional blocks:
TTL and CMOS Compatible Inputs
Each driver input has been designed to accommodate a
wide range of logic families. The input threshold is set at
1.3V with approximately 100mV of hysteresis.
A voltage regulator with low standby current provides
continuous bias for the TTL to CMOS converters. The TTL
U
IN
FUNCTIONS
U
LOW STANDBY
TTL-TO-CMOS
I D AGRA
REGULATOR
CONVERTER
CURRENT
GND
V
S
U
U
W
ANALOG SECTION
REFERENCE
100mV
ANALOG
REGULATORS
VOLTAGE
DIGITAL
COMP
SHOT
ONE
DELAY
10 s
This pin is also a high impedance CMOS gate with ESD
protection and, therefore, should not be forced beyond the
power supply rails. To defeat the over current protection,
short the drain sense to supply.
Some loads, such as large supply capacitors, lamps or
motors require high inrush currents. An RC time delay
must be added between the sense resistor and the drain
sense pin to ensure that the drain sense circuitry does not
false trigger during start-up. This time constant can be set
from a few microseconds to many seconds. However, very
long delays may put the MOSFET in risk of being destroyed
by a short-circuit condition (see Applications Information
section).
to CMOS converter output enables the rest of the circuitry.
In this way the power consumption is kept to a minimum
in the standby mode.
Internal Voltage Regulation
The output of the TTL to CMOS converter drives two
regulated supplies which power the low voltage CMOS
logic and analog blocks. The regulator outputs are isolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
analog comparator.
R
S
LATCH
INPUT
AND DISCHARGE
CONTROL LOGIC
GATE CHARGE
AND CHARGE
OSCILLATOR
PUMP
GATE CHARGE
FAST/SLOW
LOGIC
LTC1155
1155 BD
DRAIN
SENSE
GATE
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