ADP3110AKCPZ-RL ON Semiconductor, ADP3110AKCPZ-RL Datasheet - Page 5

• Manufacturer Part Number: ADP3110AKCPZ-RL
• Description: IC MOSFET DRIVER DUAL 12V 8-DFN
• Manufacturer: ON Semiconductor
• Type: High Side/Low Sider

Specifications of ADP3110AKCPZ-RL

• Configuration: High and Low Side, Synchronous
• Input Type: PWM
• Delay Time: 45ns
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 35V
• Voltage - Supply: 4.6 V ~ 13.2 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TDFN Exposed Pad
• Product: MOSFET Gate Drivers
• Rise Time: 55 ns
• Fall Time: 45 ns
• Propagation Delay Time: 45 ns
• Supply Voltage (max): 13.2 V
• Supply Voltage (min): 4.15 V
• Supply Current: 5 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Number Of Drivers: 2
• Output Current: 0.7 mA
• Output Voltage: 35 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Peak: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Theory of Operation
designed for driving two N−channel MOSFETs in a
synchronous buck converter topology. The ADP3110A will
operate from 5.0 V or 12 V, but have been optimized for high
current multi−phase buck regulators that convert 12 V rail
directly to the core voltage required by complex logic chips.
A single PWM input signal is all that is required to properly
drive the high−side and the low−side MOSFETs. Each driver
is capable of driving a 3 nF load at frequencies up to 1 MHz.
Low−Side Driver
ground−referenced low R
voltage rail for the low−side driver is internally connected to
the V
High−Side Driver
R
side driver is developed by a bootstrap circuit referenced to
Switch Node (SW) pin.
and an external bootstrap capacitor. When the ADP3110A
are starting up, the SW pin is at ground, so the bootstrap
capacitor will charge up to V
See Figure 4. When the PWM input goes high, the high−side
driver will begin to turn on the high−side MOSFET using the
stored charge of the bootstrap capacitor. As the high−side
MOSFET turns on, the SW pin will rise. When the high−side
MOSFET is fully on, the switch node will be at 12 V, and the
BST pin will be at 12 V plus the charge of the bootstrap
capacitor (approaching 24 V).
node goes low during the next cycle.
Safety Timer and Overlap Protection Circuit
regulator do not both conduct at the same time. Excessive
shoot−through or cross conduction can damage the
MOSFETs, and even a small amount of cross conduction
will cause a decrease in the power conversion efficiency.
the status of the external mosfets and applying the
appropriate amount of “dead−time” or the time between the
turn off of one MOSFET and the turn on of the other
MOSFET.
after a propagation delay (tpdlDRVL). The time it takes for
the low−side MOSFET to turn off (tfDRVL) is dependent on
the total charge on the low−side MOSFET gate. The
ADP3110A monitor the gate voltage of both MOSFETs and
the switchnode voltage to determine the conduction status of
the MOSFETs. Once the low−side MOSFET is turned off an
internal timer will delay (tpdhDRVH) the turn on of the
high−side MOSFET
DS(on)
The ADP3110A are single phase MOSFET drivers
The
The high−side driver is designed to drive a floating low
The bootstrap circuit is comprised of an external diode,
The bootstrap capacitor is recharged when the switch
It is very important that MOSFETs in a synchronous buck
The ADP3110A prevent cross conduction by monitoring
When the PWM input pin goes high, DRVL will go low
CC
N−channel MOSFET. The gate voltage for the high
low−side
supply and PGND.
driver
DS(on)
CC
is
through the bootstrap diode
N−Channel MOSFET. The
designed
APPLICATIONS INFORMATION
to
drive
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go low after the propagation delay (tpdDRVH). The time to
turn off the high−side MOSFET (tfDRVH) is dependent on
the total gate charge of the high−side MOSFET. A timer will
be triggered once the high−side mosfet has stopped
conducting, to delay (tpdhDRVL) the turn on of the
low−side MOSFET
Power Supply Decoupling
currents to the gate pins of the external MOSFETs. In order
to maintain a constant and stable supply voltage (V
ESR capacitor should be placed near the power and ground
pins. A 1 mF to 4.7 mF multi layer ceramic capacitor (MLCC)
is usually sufficient.
Input Pins
ADP3110A have internal protection for Electro Static
Discharge (ESD), but in normal operation they present a
relatively high input impedance. If the PWM controller does
not have internal pulldown resistors, they should be added
externally to ensure that the driver outputs do not go high
before the controller has reached its under voltage lockout
threshold. The NCP5381 controller does include a passive
internal pull−down resistor on the drive−on output pin.
Bootstrap Circuit
(C
these components can be done after the high−side MOSFET
has been chosen. The bootstrap capacitor must have a
voltage rating that is able to withstand twice the maximum
supply voltage. A minimum 50 V rating is recommended.
The capacitance is determined using the following equation:
where Q
MOSFET, and DV
high−side MOSFET drive. For example, a NTD60N03 has
a total gate charge of about 30 nC. For an allowed droop of
300 mV, the required bootstrap capacitance is 100 nF. A
good quality ceramic capacitor should be used.
maximum supply voltage plus any peak ringing voltages
that may be present on SW. The average forward current can
be estimated by:
where f
controller. The peak surge current rating should be checked
in−circuit, since this is dependent on the source impedance
of the 12 V supply and the ESR of C
Likewise, when the PWM input pin goes low, DRVH will
The ADP3110A can source and sink relatively large
The PWM input and the Output Disable pins of the
The bootstrap circuit uses a charge storage capacitor
The bootstrap diode must be rated to withstand the
BST
) and the internal (or an external) diode. Selection of
MAX
GATE
is the maximum switching frequency of the
I F(AVG) + Q GATE
is the total gate charge of the high−side
BST
C BST +
is the voltage droop allowed on the
Q GATE
DV BST
BST.
f MAX
CC
) a low