VNS1NV04DP-E STMicroelectronics, VNS1NV04DP-E Datasheet

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VNS1NV04DP-E

Manufacturer Part Number
VNS1NV04DP-E
Description
MOSFET N-CH 40V 1.7A 8SOIC
Manufacturer
STMicroelectronics
Series
OMNIFET II™r
Type
Low Sider
Datasheet

Specifications of VNS1NV04DP-E

Input Type
Non-Inverting
Number Of Outputs
2
On-state Resistance
250 mOhm
Current - Peak Output
1.7A
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Current - Output / Channel
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
VNS1NV04DP-E
Manufacturer:
ST
Quantity:
3 310
Features
1. Per each device.
Table 1.
April 2010
Max On-state resistance
Current limitation (typ)
Drain-Source clamp voltage
Linear current limitation
Thermal shutdown
Short circuit protection
Integrated clamp
Low current drawn from input pin
Diagnostic feedback through input pin
ESD protection
Direct access to the gate of the power mosfet
(analog driving)
Compatible with standard power mosfet
In compliance with the 2002/95/EC european
directive
Device summary
Package
SO-8
(1)
(1)
(1)
V
R
I
CLAMP
DS(
LIMH
ON
)
250mΩ
Doc ID 17344 Rev 2
1.7A
40V
VNS1NV04DP-E
fully autoprotected Power MOSFET
Tube
Description
The VNS1NV04DP-E is a device formed by two
monolithic OMNIFET II chips housed in a
standard SO-8 package. The OMNIFET II are
designed in STMicroelectronics VIPower™ M0-3
technology: they are intended for replacement of
standard Power MOSFETs from DC up to 50KHz
applications. Built in thermal shutdown, linear
current limitation and overvoltage clamp protects
the chip in harsh environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Order codes
VNS1NV04DP-E
SO-8
VNS1NV04DPTR-E
Tape and reel
OMNIFET II
www.st.com
1/24
1

Related parts for VNS1NV04DP-E

VNS1NV04DP-E Summary of contents

Page 1

... LIMH V 40V CLAMP Description The VNS1NV04DP device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPower™ M0-3 technology: they are intended for replacement of standard Power MOSFETs from 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments ...

Page 2

... Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16 3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.1 ECOPACK 5.2 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/24 ® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Doc ID 17344 Rev 2 VNS1NV04DP-E ...

Page 3

... VNS1NV04DP-E List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Thermal data Table 4. Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table Table 6. Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 7. Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 8. Source Drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 10. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 11. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Doc ID 17344 Rev 2 List of tables ...

Page 4

... Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 32. SO-8 thermal impedance junction ambient single pulse Figure 33. Thermal fitting model of a double channel HSD in SO Figure 34. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 35. SO-8 tube shipment (no suffix Figure 36. SO-8 tape and reel shipment (suffix “TR” 4/24 Doc ID 17344 Rev 2 VNS1NV04DP-E ...

Page 5

... VNS1NV04DP-E 1 Block diagram and pin description Figure 1. Block diagram INPUT1 TEMPERATURE Figure 2. Configuration diagram (top view) DRAIN1 OVERVOLTAGE CLAMP GATE CONTROL LINEAR CURRENT OVER LIMITER SOURCE1 1 SOURCE 1 INPUT 1 SOURCE 2 4 INPUT 2 Doc ID 17344 Rev 2 Block diagram and pin description DRAIN2 OVERVOLTAGE ...

Page 6

... T Case operating temperature c T Storage temperature stg 6/24 R IN1 INPUT 1 R IN2 IN2 INPUT 2 SOURCE 1 Parameter = 0 V) INn = 25 °C c Doc ID 17344 Rev 2 VNS1NV04DP DRAIN DRAIN 2 V SOURCE 2 DS1 Value Internally clamped Internally clamped +/-20 330 Internally limited -3 4000 16500 4 Internally limited Internally limited ...

Page 7

... VNS1NV04DP-E 2.2 Thermal data Table 3. Thermal data Symbol R Thermal resistance junction-lead (per channel) thj-lead R Thermal resistance junction-ambient thj-amb 2.3 Electrical characteristics (1) Table 4. Off Symbol Parameter Drain-source clamp V CLAMP voltage Drain-source clamp V CLTH threshold voltage Input threshold V INTH voltage Supply current from ...

Page 8

... 200 µH DD (see Figure 5) (1) Test conditions Starting ° gen (see Figure 6 and Doc ID 17344 Rev 2 VNS1NV04DP-E Min. Typ. 70 170 = 330 Ω MIN 350 200 0.25 1.3 = 2.2 KΩ 1.8 1 330 Ω MIN = Figure 7) Min. Typ. Max. Unit = 0 205 - 100 - 0.75 Min ...

Page 9

... VNS1NV04DP-E Figure 4. Switching time test circuit for resistive load gen Figure 5. Test circuit for diode recovery times 330Ω d(on) d(off FAST OMNIFET DIODE gen I V gen Doc ID 17344 Rev 2 Electrical specifications gen V gen L=100uH OMNIFET S 8.5 Ω 9/24 ...

Page 10

... Electrical specifications Figure 6. Unclamped inductive load test circuits Figure 7. Input charge test circuit V IN 10/24 R GEN GEN Doc ID 17344 Rev 2 VNS1NV04DP-E ND8003 ...

Page 11

... VNS1NV04DP-E Figure 8. Unclamped inductive waveforms Doc ID 17344 Rev 2 Electrical specifications 11/24 ...

Page 12

... Figure 10. Static drain-source (A) Figure 12. Static drain-source on Figure 14. Transconductance Id=1.5A Id=1A Id=1.5A Id=1A Id=1.5A Id=1A 4.5 5 5.5 6 6.5 Vin(V) Doc ID 17344 Rev 2 VNS1NV04DP-E resistance Rds(on) (ohms) 4.5 Tj=-40ºC 4 Vin=2.5V 3.5 3 2.5 2 1 0.05 0.1 0.15 0.2 0.25 Id(A) resistance vs input voltage ...

Page 13

... VNS1NV04DP-E Figure 15. Static drain-source on resistance vs id Rds(on) (mohms) 500 450 400 350 300 250 200 150 100 0.25 0.5 Figure 17. Turn-on current slope (part 1/2) di/dt(A/us 500 Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage Vin ( Vds=12V Id=0. Figure 16. Transfer characteristics Vin=3.5V Tj=150º ...

Page 14

... Rg(ohm) Figure 24. Switching time resistive load td(off td(on) Rg(ohm) Figure 26. Normalized on resistance vs Vin=5.5V Vin=4.5V Vin=3.5V Vin= VDS(V) Doc ID 17344 Rev 2 VNS1NV04DP-E C(pF) 225 200 f=1MHz Vin=0V 175 150 125 100 Vds(V) (part 2/2) t(ns) 550 500 Vdd=15V tr 450 Id=0 ...

Page 15

... VNS1NV04DP-E Figure 27. Normalized input threshold voltage vs temperature Vinth (V) 2 1.8 Vds=Vin 1.6 Id=1mA 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -50 -25 0 Figure 29. Step response current limit Tdlim(us) 2.4 2.3 2.2 2 Figure 28. Normalized current limit 100 125 150 175 Tc (ºC) ...

Page 16

... INPUT pin voltage. When the current limiter is D lim through the INPUT pin in order to indicate fault condition. If driven from gf , the INPUT pin will fall to 0V. This will not however affect the gf Doc ID 17344 Rev 2 VNS1NV04DP-E > the device tries to sink a j jsh . ISS jsh. ...

Page 17

... VNS1NV04DP-E 4 Package and PCB thermal data 4.1 SO-8 thermal data Figure 30. SO-8 PC board Note: Layout condition of R thickness = 2 mm, Cu thickness = 35 µm, Copper areas: from minimum pad lay-out Figure 31. R thj-amb RTH _amb (°C/W) J 115 110 105 100 and Z measurements (PCB FR4 area = mm, PCB ...

Page 18

... ZTH ( ° 1000 100 10 1 0,1 0,0001 0,001 Equation 1: pulse calculation formula ⋅ δ THδ TH where δ Figure 33. Thermal fitting model of a double channel HSD in SO-8 18/24 0,01 0,1 Time ( δ – THtp Doc ID 17344 Rev 2 VNS1NV04DP 100 1000 2 0.07cm 0.6 cm ...

Page 19

... VNS1NV04DP-E Table 10. Thermal parameters Area/island ( (°C/ (°C/ (°C/ R10 (°C/ R11 (°C/ R12 (°C/W) R13 = R14 (°C/ (W.s/° (W.s/° C10 (W.s/° C11 (W.s/° C12 (W.s/° 0.07 0. 100 250 0.0005 0.02 0.035 0.2 0.4 Doc ID 17344 Rev 2 Package and PCB thermal data 0 ...

Page 20

... In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. 5.2 SO-8 package information Figure 34. SO-8 package dimensions 20/24 packages Doc ID 17344 Rev 2 VNS1NV04DP-E ® ...

Page 21

... VNS1NV04DP-E Table 11. SO-8 mechanical data Symbol ( ( ccc 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0. total (both side). 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0 ...

Page 22

... P0 (± 0. (± 0.1/-0) 1.5 D1 (min) 1.5 F (± 0.05) 5.5 K (max) 4.5 P1 (± 0.1) 2 End Top cover tape Doc ID 17344 Rev 2 VNS1NV04DP-E 100 2000 532 3.2 6 0.6 REEL DIMENSIONS Base Q.ty 2500 Bulk Q.ty 2500 A (max) 330 B (min) 1.5 C (± -0) 12 ...

Page 23

... VNS1NV04DP-E 6 Revision history Table 12. Document revision history Date 09-Jun-2008 02-Apr-2010 Revision 1 Initial release. Changed template. 2 Updated Table 17: Turn-on current slope (part Doc ID 17344 Rev 2 Revision history Changes 1/2). 23/24 ...

Page 24

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 24/24 Please Read Carefully: © 2010 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com Doc ID 17344 Rev 2 VNS1NV04DP-E ...

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