E-L9826TR STMicroelectronics, E-L9826TR Datasheet
E-L9826TR
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E-L9826TR Summary of contents
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... Table 1. Device summary Order code L9826 L9826TR E-L9826 E-L9826TR February 2011 Octal protected low-side driver with diagnostic and serial/parallel input control = 25 °C The 8 -bit serial peripheral interface (SPI) is able to control the device's eight channels and to provide its load's diagnosis. In addition output 1 and 2 can also be controlled through dedicated input pins NON1 and NON2 ...
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... Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.2 Output stage control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.2.1 5.2.2 5.3 Output stage diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.3.1 5.3.2 5.4 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.4.1 5 ...
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... Absolute maximum ratings for currents determined within the device . . . . . . . . . . . . . . . . . 7 Table 5. Thermal data Table 6. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 7. Outputs control tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 8. Diagnostic table for outputs 1 and 2 in parallel controlled mode . . . . . . . . . . . . . . . . . . . . 15 Table 9. Diagnostic table for outputs SPI controlled mode . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 10. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Doc ID 7214 Rev 9 List of tables 3/19 ...
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... Parallel control for output 1 and 2 (Example for Power-on Figure 5. Output control register structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 6. Timing of the serial interface Figure 7. The pulse diagram to read the outputs status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. The structure of the outputs status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 9. SO20 mechanical data and package dimensions 4/19 ...
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... L9826 1 Block Diagram Figure 1.Block diagram Doc ID 7214 Rev 9 Block Diagram 5/19 ...
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... Description Output 6 Output 1 Asynchronous reset Chip select (active low) Device ground Device ground Control input 1 Serial data output Output 8 Output 3 Output 5 Output 2 Serial data input Serial clock Device ground Device ground Control input 2 Supply voltage Output 7 Output 4 Doc ID 7214 Rev 9 L9826 ...
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... Output current (Out1, Out2) I OUT Output current (Out3 ... Out8) ΣI OUT1 Total average-current all outputs i = 1-8 1. When operating the device with short circuit 1ch and 2ch outputs at the same time, damage due to electrical overstress might occur. 3.2 Thermal data Table 5. Thermal data Symbol Parameter ...
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... SDOL I Tristate leakage current SDOL C Output capacitance SDO Outputs OUT 1 ... 8 I Leakage current OUTL1 - 8 8/19 ≤ 5.5 V; -40 °C ≤ T ≤ 150 °C; unless otherwise specified Test condition without load (nRes = Low 500 mA OUT1 ... 8 SPI - CLK = 3 MHz NCS = LOW SDO no load ...
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... Turn ON voltage slew-rate on1/dt dU Turn ON voltage slew-rate on2/dt dU Turn OFF voltage slew-rate off1/dt dU Turn OFF voltage slew-rate off2/dt Serial diagnostic link (load capacitor at SDO = 100 pF) f Clock frequency clk t Minimum time CLK = high clh t Minimum time CLK = low cll Propagation delay CLK to data ...
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... CLK high after NCS high hclch t NCS L/H to output data float pchdz - NCS pulse filter time 10/19 Test condition - Setup time CLK to NCS change H/L - CLK change H/L after SDI data valid SDI data hold after CLK change H Multiple of 8 CLK cycles inside ...
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... The Test Pulses are coupled to the outputs with 200 pF series capacitor and all the outputs are able to withstand to test pulses without damage. The load applied was in the range 100 ohm for the resistive part and 0 to 600 mH for the inductive one. ...
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... A further feature is the possibility to drive these outputs through a PWM signal independently by SPI commands. Reset signal is common for all the eight channels and it is active low. After an external reset condition (that means NRES pin switched from low to high) to drive outputs 1 and 2 through ...
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... NCS signal is low. The 8-bit command data are transmitted into L9826 shift registers every CLK falling edge (see The NCS rising edge latches the new data from the shift register to the driver and the output are driven following the commands just sent. ...
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... The second one is considered right. The next Figure 7 into the dedicated registers. When NCS is low the data contained in the shift register are transferred to SDO output every CLK rising edge. Figure 7. The pulse diagram to read the outputs status register Figure 8 ...
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... The output was previously switched-on, its voltage exceeds the diagnostic threshold and the result is that the output is switched-off. The diagnostic bit is high. Fault condition (2) "open load" or "output shorted to GND" the same behavior explained for the outputs 1 and 2 (see paragraph 5.3.1), at NCS falling edge the output status data are transferred to the shift register. Table 9. ...
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... Functional description 5.4 Protections 5.4.1 Flyback current Turning off the low side driver with an inductive load, its output voltage rises due to the inductor that tries to drive current. This voltage is internally clamped by the flyback circuit at V value, typical 50V CPL 5.4.2 Current regulation mode outputs 1 and 2 Outputs 1 and 2 which are particularly dedicated for loads with inrush current (as lamps) ...
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... L9826 6 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. Figure 9. SO20 mechanical data and package dimensions Doc ID 7214 Rev 9 Package information ® ...
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... Revision 7 Initial release in EDOCS Document reformatted. 8 Modify value R in the “Features”. ON Updated Features and Updated Table 1: Device summary on page 9 Updated Figure 3: Typical application circuit Reworked the content of the Doc ID 7214 Rev 9 Changes Description on page 1. 1. diagram. Section 5: Functional description. ...
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