VND830SP-E STMicroelectronics, VND830SP-E Datasheet
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
VND830SP-E
Specifications of VND830SP-E
Available stocks
Related parts for VND830SP-E
VND830SP-E Summary of contents
Page 1
... VERY LOW STAND-BY CURRENT n REVERSE BATTERY PROTECTION (**) IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE DESCRIPTION The VND830SP monolithic device made by using STMicroelectronics Technology, intended for driving any kind of load with one side connected to ground. Active V voltage clamp protects the device against low ...
Page 2
... VND830SP-E Figure 2. Block Diagram V CC CLAMP GND INPUT1 STATUS1 LOGIC OVERTEMP. 1 INPUT2 STATUS2 OVERTEMP. 2 Table 3. Absolute Maximum Ratings Symbol DC Supply Voltage Reverse DC Supply Voltage Reverse Ground Pin Current GND I DC Output Current OUT - I Reverse DC Output Current OUT I DC Input Current Status Current ...
Page 3
... V INPUT 1 I STAT1 OUTPUT 1 STATUS 1 I IN2 INPUT 2 I STAT2 OUTPUT 2 STATUS 2 GND V STAT2 I GND Parameter (at least 35 m thick). Horizontal mounting and no artificial (at least 35 m thick). Horizontal mounting and no artificial VND830SP-E OUTPUT 1 OUTPUT 1 N.C. OUTPUT 2 OUTPUT 2 Input (*) OUT1 V OUT1 I OUT2 V OUT2 Value 1 ...
Page 4
... VND830SP-E ELECTRICAL CHARACTERISTICS (8V<V <36V; -40°C < T < 150°C, unless otherwise specified (Per each channel) Table 5. Power Output Symbol Parameter V (**) Operating Supply Voltage CC V (**) Undervoltage Shut-down USD V (**) Overvoltage Shut-down State Resistance ON I (**) Supply Current S I Off State Output Current L(off1) I Off State Output Current ...
Page 5
... V =10.4V OUT R =6.5 from V =11. OUT V =1.3V OUT Test Conditions V = =0A OUT V =0V IN Test Conditions V = 1.25V 3.25V 1mA -1mA IN VND830SP-E Min Typ Max Unit 0 100 -0.7 V Min Typ Max Unit See relative V/ s diagram See relative V/ s diagram Min Typ ...
Page 6
... VND830SP-E Figure 5. OPEN LOAD STATUS TIMING (with external pull-up) V OUT V INn V STATn t DOL(off) Table 12. Truth Table CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > Output Current < 6/20 I < I > V OUT DOL(on) INPUT OUTPUT OVER TEMP STATUS TIMING T > TSD ...
Page 7
... Pin CC TEST LEVELS II III -50 V -75 V +50 V +75 V -50 V -100 V + +46.5 V +66.5 V TEST LEVELS RESULTS CONTENTS VND830SP-E 90% dV /dt OUT (off Delays and Impedance -100 +100 V 0 -150 V 0 +100 V 0 100 ms, 0.01 +86.5 V 400 ms, 2 III ...
Page 8
... VND830SP-E Figure 7. Waveforms INPUT n OUTPUT VOLTAGE STATUS INPUT n OUTPUT VOLTAGE STATUS INPUT n OUTPUT VOLTAGE STATUS n INPUT n OUTPUT VOLTAGE STATUS n INPUT n OUTPUT VOLTAGE STATUS INPUT n OUTPUT CURRENT STATUS n 8/20 NORMAL OPERATION n UNDERVOLTAGE V USDhyst V USD n undefined OVERVOLTAGE V >V V < OPEN LOAD with external pull-up V > ...
Page 9
... Transient Suppressor) if the ld load dump peak voltage exceeds V becomes the The same applies if the device will be subject to S(on)max transients on the V shown in the ISO T/R 7637/1 table. will GND . GND VND830SP OUTPUT1 OUTPUT2 D GND ) in the ground line. GND =1k should be inserted in parallel to GND ...
Page 10
... VND830SP-E C I/Os PROTECTION ground protection network is used and negative transient are present on the V line, the control pins will CC be pulled negative. ST suggests to insert a resistor (R in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os ...
Page 11
... Figure 14. Status Leakage Current Ilstat (uA) 0.05 0.04 0.03 0.02 0.01 100 125 150 175 Figure 15. Status Clamp Voltage Vscl (V) 8 7.8 7.6 7.4 7.2 7 6.8 6.6 6.4 6.2 6 100 125 150 175 VND830SP-E Vin=3.25V -50 - 100 125 Tc (°C) Vstat=5V 0 -50 - 100 125 Tc (°C) Istat=1mA -50 - ...
Page 12
... VND830SP-E Figure 16. On State Resistance Vs T Ron (mOhm) 160 140 Iout=2A Vcc=8V; 13V & 36V 120 100 -50 - (°C) Figure 17. Openload On State Detection Threshold Iol (mA) 150 140 Vcc=13V 130 Vin=5V 120 110 100 -50 - (ºC) Figure 18. Input High Level Vih (V) 3.6 3.4 3 ...
Page 13
... Figure 26. Turn-off Voltage Slope dVout/dt(off) (V/ms) 600 550 500 450 400 350 300 250 200 100 125 150 175 100 125 150 175 VND830SP-E -50 - 100 125 Tc (°C) Vcc=13V Rl=6.5Ohm -50 - 100 125 Tc (ºC) 150 175 150 175 ...
Page 14
... VND830SP-E Figure 27. Maximum turn off current versus load inductance I LMAX (A) 100 Single Pulse at T =150ºC Jstart B= Repetitive pulse at T =100ºC Jstart C= Repetitive Pulse at T =125ºC Jstart Conditions: V =13. Demagnetization 14/ L(mH ) Values are generated with R In case of repetitive pulses, T ...
Page 15
... Figure 28. PowerSO-10™ PC Board Layout condition of R and thickness=35 m, Copper areas: from minimum pad lay-out to 8cm Figure 29 PCB copper area in open box free air condition thj-amb RTHj_amb (°C/ measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm PCB Cu heatsink area (cm^2) VND830SP Tj-Tamb=50° 15/20 ...
Page 16
... VND830SP-E Figure 30. PowerSO-10 Thermal Impedance Junction Ambient Single Pulse ZTH (°C/W) 1000 100 10 1 0.1 0.01 0.0001 0.001 Figure 31. Thermal fitting model of a double channel HSD in PowerSO-10 Tj_1 Pd1 C1 C2 Tj_2 R1 R2 Pd2 T_amb 16/20 0.01 0.1 1 Time (s) Pulse calculation formula ...
Page 17
... B 0. SEATING PLANE DETAIL "A" 0. DETAIL "A" VND830SP-E millimeters Typ Max 3.65 0.10 0.60 0.53 0.55 0.32 9.60 7.60 9.50 7.60 7.50 6.10 6.30 1.27 1.35 1.40 14.40 14.35 0.50 1.80 1. SEATING ...
Page 18
... VND830SP-E Figure 33. Suggested Pad Layout And Tube Shipment (No Suffix) PowerSO-10™ 14.6 - 14.9 10 6.30 0. 0. Figure 34. Tape And Reel Shipment (suffix “TR”) TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width W Tape Hole Spacing P0 (± ...
Page 19
... REVISION HISTORY Date Revision Oct. 2004 1 - First Issue. Description of Changes VND830SP-E 19/20 ...
Page 20
... VND830SP-E Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...