ADN8831ACPZ-R2 Analog Devices Inc, ADN8831ACPZ-R2 Datasheet - Page 12

• Manufacturer Part Number: ADN8831ACPZ-R2
• Description: IC THERMO COOLER CTRLR 32-LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADN8831ACPZ-R2

• Applications: Thermoelectric Cooler
• Current - Supply: 8mA
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Laser Driver Type: Thermoelectric Cooler
• Supply Current: 8mA
• Supply Voltage Range: 3V To 5.5V
• Driver Case Style: LFCSP
• No. Of Pins: 32
• Msl: MSL 1 - Unlimited
• Supply Current Max: 15mA
• Device Type: Laser Diode
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADN8831
TEMPERATURE LOCK INDICATOR
The TMPGD pin (Pin 11) outputs a logic high when the OUT1
voltage reaches the IN2P voltage. The TMPGD has a detection
range of ±25 mV and a 10 mV typical hysteresis. This allows
direct interfacing to the microcontrollers or supervisory
circuitry.
SOFT START ON POWER-UP
The ADN8831 can be programmed to ramp up for a specified
time after the power supply is applied or after shutdown is de-
asserted. This feature, known as soft start, is useful for gradually
increasing the duty cycle of the PWM amplifier. The soft start
time is set with a single capacitor connected from SS (Pin 14) to
ground. Calculate the capacitor value by
Where C
the soft start time in milliseconds. To set a soft start time of
15 ms, C
SHUTDOWN MODE
The shutdown mode sets the ADN8831 into an ultralow current
state. The current draw for the ADN8831 in shutdown is
typically 5 μA. The shutdown input SD
low. To shut down the device, drive SD to logic low. Once a
logic high is applied, the ADN8331 will reactivate after the
delay set by the soft start circuitry. Refer to the
Power-Up section for more details on this feature.
STANDBY MODE
The ADN8831 has a standby mode that deactivates a MOSFET
driver stage. The current draw for the ADN8831 in the standby
mode is less than 1 mA. The standby input SB pin (Pin 14) is
active low. After applying a logic high, the ADN8331 reactivates
following the delay.
TEC VOLTAGE/CURRENT MONITOR
TEC voltage and current are monitored at the VTEC and ITEC
pins, respectively.
Voltage Monitor
VTEC is an analog voltage output pin with a voltage
proportional to the actual voltage across the TEC. A center
VTEC voltage of 1.25 V corresponds to 0 V across TEC. The
output voltage is calculated as
τ
V
SS
VTEC
SS
SS
= 150
is the value of the capacitor in microfarads, and τ
should equal 0.1 μF.
=
. 1
×
25
C
SS
+
. 0
25
×
(
V
LFB
−
V
SFB
pin (Pin 16) is active
)
Soft Start on
SS
Rev. 0 | Page 12 of 20
is
Current Monitor
ITEC is an analog voltage output pin with a voltage proportional
to the actual current through the TEC. A center ITEC voltage of
1.25 V corresponds to 0 A through the TEC. The output voltage
is calculated as
The TEC current is obtained from this voltage by the following
equation:
MAXIMUM TEC VOLTAGE LIMIT
Set the maximum TEC voltage by applying a voltage at the
VLIM pin to protect the TEC. This voltage can be set with a
resistor divider or a DAC. The voltage limiter operates in
bidirectional TEC voltage, and cooling and heating voltage.
Using a DAC
Both the cooling and heating voltage limits are set at the same
levels when a voltage source directly drives the VLIM pin. The
maximum TEC voltage is
Where V
voltage applied at the VLIM pin.
Using a Resistor Divider
Separate voltage limits can be set using a resistor divider. The
internal current sink circuitry connected to the VLIM pin
draws a current when the ADN8831 drives the TEC in a heating
direction, thus lowering the voltage at the VLIM. The current
sink is not active when the TEC is driven in a cooling direction;
therefore, the TEC heating voltage limit is always lower than the
cooling voltage limit.
V
V
I
TEC
ITEC
TEC
TEC (MAX)
(
=
MAX
=
V
. 1
25
ITEC
25
)
×
ADN8831
= 5
is the maximum TEC voltage and V
+
R
VLIM
Figure 16. Using a Resistor Divider
−
SENSE
25
×
. 1
×
V
25
I
VLIM
SINK
(
V
LFB
−
V
CS
)
VLIM
FREQ
R
V
FREQ
REF
R
R
A
B
VLIM
is the