MAX8819CETI+ Maxim Integrated Products, MAX8819CETI+ Datasheet - Page 24

• Manufacturer Part Number: MAX8819CETI+
• Description: IC PMIC W/INT CHARGER 28TQFN-EP
• Manufacturer: Maxim Integrated Products
• Type: PMIC with Integrated Chargersr

Specifications of MAX8819CETI+

• Applications: Handheld/Mobile Devices
• Voltage - Supply: 4.1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TQFN Exposed Pad
• Output Voltage Range: 1 V to 4 V
• Input Voltage Range: 4.1 V to 5.5 V
• Input Current: 1.33 mA
• Power Dissipation: 2285.7 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PMIC with Integrated Chargers and Smart
Power Selector in a 4mm x 4mm TQFN
Each MAX8819_ step-down converter (REG1, REG2,
REG3) has an internal 1kΩ resistor that discharges the
output capacitor when the converter is off. The dis-
charge resistors ensure that the load circuitry powers
down completely. The internal discharge resistors are
connected when a converter is disabled and when the
device is in UVLO with an input voltage greater than
1.0V. With an input voltage less than 1.0V the internal
discharge resistors are not activated.
Figure 5a shows the MAX8819A/MAX8819B enable and
disable logic. Figure 5b shows the MAX8819C
Figure 6. MAX8819A/MAX8819B Enable/Disable Waveforms Example
24
______________________________________________________________________________________
NOTES
V
V
V
V
V
V
V
V
V
EN123
V
Disable (EN123) and Sequencing
OUT1
OUT2
OUT3
OUT4
RST1
V
CEN
CHG
SYS
EN4
DC
1
Active Discharge in Shutdown
Step-Down Converter Enable/
t
SS-D-S
V
BAT
2
Step-Down Converter
V
SYS
- V
3
D
V
BAT
t
t
SS1
t
SS3
SS2
< V
SYS
4
< V
t
DRST1
DC
5
enable/disable logic. Figure 6 shows an example of
enable and disable waveforms for the MAX8819A/
MAX8819B.
Figure 6 notes:
1) The device is off with no external power applied to
2) An external supply is applied to DC that causes the
3) When V1 reaches the reset trip threshold (V
6
DC. The system voltage (V
tery voltage (V
step-down converter to power up after the DC-to-
SYS soft-start time (t
valid and DLIM[1:2] ≠ 11, V
the reset deassert delay timer starts. When the reset
deassert delay timer expires (t
high-impedance. If RST1 is connected to the RESET
IMPEDANCE
t
SS4
HIGH
t
SS_CHG
7
BAT
V
BAT
).
8
SS-D-S
V
SYS
SYS
SYS
). When the DC input is
- V
D
) is equal to the bat-
increases.
DRST1
), RST1 goes
THRST
),