LM75AD,112 NXP Semiconductors, LM75AD,112 Datasheet - Page 9
![IC TEMP SENSOR DIGITAL 8-SOIC](/photos/5/44/54425/568-8-soic_sot96-1_sml.jpg)
LM75AD,112
Manufacturer Part Number
LM75AD,112
Description
IC TEMP SENSOR DIGITAL 8-SOIC
Manufacturer
NXP Semiconductors
Datasheet
1.LM75ADP118.pdf
(24 pages)
Specifications of LM75AD,112
Package / Case
8-SOIC (3.9mm Width)
Function
Temp Sensor, Watchdog
Topology
ADC (Sigma Delta), Comparator, Oscillator, Register Bank
Sensor Type
Internal
Sensing Temperature
-55°C ~ 125°C
Output Type
I²C™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
2.8 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM6285 - EVAL BOARD I2C-2002-1A568-4002 - DEMO BOARD I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4226-5
935269775112
LM75AD
LM75AD
935269775112
LM75AD
LM75AD
NXP Semiconductors
LM75A_4
Product data sheet
7.5 OS output and polarity
7.6 OS comparator and interrupt modes
Table 11.
Table 12.
When a set-point register is read, all 16 bits are provided to the bus and must be collected
by the controller to complete the bus operation. However, only the 9 most significant bits
should be used and the 7 LSB of the LSByte are equal to zero and should be ignored.
Table 13
Table 13.
The OS output is an open-drain output and its state represents results of the device
watchdog operation as described in
external pull-up resistor is needed. The resistor should be as large as possible, up to
200 k , to minimize the Temp reading error due to internal heating by the high OS sinking
current.
The OS output active state can be selected as HIGH or LOW by programming bit B2
(OS_POL) of register Conf: setting bit OS_POL to logic 1 selects OS active HIGH and
setting bit B2 to logic 0 sets OS active LOW. At power-up, bit OS_POL is equal to logic 0
and the OS active state is LOW.
As described in
comparison between register Temp data and the programmed limits, in registers Tos and
Thyst, in different ways depending on the selected OS mode: OS comparator or
OS interrupt. The OS mode is selected by programming bit B1 (OS_COMP_INT) of
register Conf: setting bit OS_COMP_INT to logic 1 selects the OS interrupt mode, and
setting to logic 0 selects the OS comparator mode. At power-up, bit OS_COMP_INT is
equal to logic 0 and the OS comparator is selected.
MSByte
MSByte
11-bit binary
(2’s complement)
0 1111 1010
0 0011 0010
0 0000 0001
0 0000 0000
1 1111 1111
1 1100 1110
1 1001 0010
D8
D8
7
7
D7
D7
6
6
shows examples of the limit data and value.
Tos register
Thyst register
Tos and Thyst limit data and value
D6
D6
5
5
Section
D5
D5
4
4
Hexadecimal value
0FA
032
001
000
1FF
1CE
192
D4
D4
Rev. 04 — 10 July 2007
3
3
7.1, the device OS output responds to the result of the
D3
D3
2
2
D2
D2
1
1
Digital temperature sensor and thermal watchdog
Section
D1
D1
0
0
7.1. In order to observe this output state, an
LSByte
LSByte
Decimal value
250
50
1
0
D0
D0
1
50
110
7
7
X
X
6
6
X
X
5
5
X
X
4
4
Value
+125.0 C
+25.0 C
+0.5 C
0.0 C
0.5 C
25.0 C
55.0 C
X
X
3
3
© NXP B.V. 2007. All rights reserved.
LM75A
X
X
2
2
X
X
1
1
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X
X
0
0