LM96194CISQ/NOPB National Semiconductor, LM96194CISQ/NOPB Datasheet - Page 101
![IC TRUTHERM HDWR MONITOR 48-LLP](/photos/6/51/65163/pkg_sqa48a_sml.jpg)
LM96194CISQ/NOPB
Manufacturer Part Number
LM96194CISQ/NOPB
Description
IC TRUTHERM HDWR MONITOR 48-LLP
Manufacturer
National Semiconductor
Series
PowerWise®, TruTherm®r
Datasheet
1.LM96194CISQNOPB.pdf
(106 pages)
Specifications of LM96194CISQ/NOPB
Function
Fan Control, Temp Monitor
Topology
ADC (Sigma Delta), Comparator, Fan Control, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 85°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM96194CISQTR
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FAN RPM-TO-DIGITAL CHARACTERISTICS
PWM OUTPUT CHARACTERISTICS
RESET INPUT/OUTPUT CHARACTERISTICS
SMBus TIMING CHARACTERISTICS
f
t
t
t
t
t
t
t
t
t
t
t
t
C
SMBCLK
BUF
HD;STA
SU;STA
SU;STO
SU;DAT
HD;DAT
LOW
HIGH
R
F
TIMEOUT
POR
L
AC Electrical Characteristics
The following limits apply for +3.0 V
the operating range; all other limits T
Symbol
Counter Resolution
Number of fan tach pulses count is based
on
Counter Frequency
Accuracy
Frequency Tolerances
Duty-Cycle Tolerance
Output Pulse Width
Upon Power Up
Minimum Input Pulse Width
Reset Output Fall Time
SMBCLK (Clock) Clock Frequency
SMBus Free Time between Stop and
Start Conditions
Hold time after (Repeated) Start
Condition. After this period, the first clock
is generated.
Repeated Start Condition Setup Time
Stop Condition Setup Time
Data Input Setup Time to SMBCLK High
Data Output Hold Time after SMBCLK
Low
SMBCLK Low Period
SMBCLK High Period
Rise Time
Fall Time
Timeout
SMBDAT or SMBCLK low
time required to
reset the Serial Bus
Interface to the Idle State
Time in which a device must be
operational after power-on reset
Capacitance Load on SMBCLK and
SMBDAT
Parameter
DC
to +3.6 V
A
= T
J
= 25°C unless otherwise noted.
DC
, unless otherwise noted. Bold face limits apply for T
1.6V to 0.4V Logic Levels
V
DD
> +2.8V
101
Conditions
(Note
Typical
22.5
14
±2
31
2
9)
A
= T
(Note
J
Limits
= T
1075
250
330
100
250
300
300
500
400
4.7
4.0
4.7
4.0
4.7
4.0
±6
±6
±6
10
10
50
50
25
35
1
1
MIN
10)
www.national.com
to T
kHz (max)
kHz (min)
ms (max)
ms (max)
ms (max)
pF (max)
ms (min)
µs (max)
ns (max)
µs (max)
µs (max)
µs (max)
ns (max)
ms (min)
% (max)
% (max)
% (max)
(Limits)
µs (min)
µs (min)
µs (min)
µs (min)
µs (min)
ns (min)
ns (min)
µs (min)
µs (min)
MAX
pulses
Units
kHz
bits
ms
of
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