LM96194CISQ/NOPB National Semiconductor, LM96194CISQ/NOPB Datasheet - Page 96
![IC TRUTHERM HDWR MONITOR 48-LLP](/photos/6/51/65163/pkg_sqa48a_sml.jpg)
LM96194CISQ/NOPB
Manufacturer Part Number
LM96194CISQ/NOPB
Description
IC TRUTHERM HDWR MONITOR 48-LLP
Manufacturer
National Semiconductor
Series
PowerWise®, TruTherm®r
Datasheet
1.LM96194CISQNOPB.pdf
(106 pages)
Specifications of LM96194CISQ/NOPB
Function
Fan Control, Temp Monitor
Topology
ADC (Sigma Delta), Comparator, Fan Control, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 85°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM96194CISQTR
- Current page: 96 of 106
- Download datasheet (2Mb)
www.national.com
Register
Address
Register
Address
16.14.7 Register EAh S4/5 GPI Mask
16.14.8 Register EBh S4/5 Temperature/Voltage Mask
EBh
EAh
Read/
Write
R/W
Read/
Write
R/W
7:3
Bit
Bit
S4/5 Voltage
0
1
2
3
4
5
6
7
0
1
2
3
Register
Name
Mask
S4/5 GPI
Register
AIN13_S4/5_MSK
AIN14_S4/5_MSK
TEMP_S4/5_MSK
GPI0_S4/5_MSK
GPI1_S4/5_MSK
GPI2_S4/5_MSK
GPI3_S4/5_MSK
GPI4_S4/5_MSK
GPI5_S4/5_MSK
GPI6_S4/5_MSK
GPI7_S4/5_MSK
Name
Mask
Name
Name
RES
RES
Bit 7 Bit 6 Bit 5 Bit 4
_MSK
_S4/5
Bit 7
GPI7
RES
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
_S4/5
_MSK
GPI6
Bit 6
R
If set, GPI0 errors are masked in S4/5 sleep state.
If set, GPI1 errors are masked in S4/5 sleep state.
If set, GPI2 errors are masked in S4/5 sleep state.
If set, GPI3 errors are masked in S4/5 sleep state.
If set, GPI4 errors are masked in S4/5 sleep state.
If set, GPI5 errors are masked in S4/5 sleep state.
If set, GPI6 errors are masked in S4/5 sleep state.
If set, GPI7 errors are masked in S4/5 sleep state.
RESERVED. Leave "HIGH" for proper operation of the
part.
If set, AIN13 errors as masked in S4/5 sleep state.
If set, AIN14 errors as masked in S4/5 sleep state.
If set, temperature errors and diode fault errors for zones
1 and 2 are masked in S4/5 sleep state.
Reserved
_MSK
_S4/5
GPI5
Bit 5
S4/5_MSK
96
TEMP_
Bit 3
_MSK
_S4/5
GPI4
Bit 4
AIN14_S4/5
Description
Description
_MSK
_S4/5
_MSK
GPI3
Bit 3
Bit 2
_MSK
_S4/5
GPI2
Bit 2
AIN13_S4/5
_MSK
Bit 1
_MSK
_S4/5
GPI1
Bit 1
AIN12_S4/5
_MSK
_MSK
_S4/5
Bit 0
Bit 0
GPI0
Default
Value
Default
FFh
Value
07h
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