ISL6742AAZA Intersil, ISL6742AAZA Datasheet - Page 14

• Manufacturer Part Number: ISL6742AAZA
• Description: IC CTRLR PWM DOUBLE ENDED 16QSOP
• Manufacturer: Intersil

Specifications of ISL6742AAZA

• Pwm Type: Voltage/Current Mode
• Number Of Outputs: 4
• Frequency - Max: 2MHz
• Duty Cycle: 100%
• Voltage - Supply: 9 V ~ 16 V
• Buck: No
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 16-QSOP
• Frequency-max: 2MHz
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Slope Compensation
Peak current-mode control requires slope compensation to
improve noise immunity, particularly at lighter loads, and to
prevent current loop instability, particularly for duty cycles
greater than 50%. Slope compensation may be accomplished
by summing an external ramp with the current feedback signal
or by subtracting the external ramp from the voltage feedback
error signal. Adding the external ramp to the current feedback
signal is the more popular method.
From the small signal current-mode model [1] it can be
shown that the naturally-sampled modulator gain, F
without slope compensation, is expressed in Equation 10:
where S
duration of the half-cycle. When an external ramp is added,
the modulator gain becomes Equation 11:
where S
The criteria for determining the correct amount of external
ramp can be determined by appropriately setting the
damping factor of the double-pole located at half the
oscillator frequency. The double-pole will be critically
damped if the Q-factor is set to 1, over-damped for Q > 1,
and under-damped for Q < 1. An under-damped condition
may result in current loop instability.
where D is the percent of on-time during a half cycle (half
period duty cycle). Setting Q = 1 and solving for S
Equation 14:
Since S
and the external ramp, respectively, they can be multiplied
by t
where V
the on time and V
external ramp.
F
F
m
Q
S
V
m
m
e
e
c
=
=
ON
=
=
=
=
-------------------------------------------------
π m
S
V
1
--------------
S
----------------------------------- -
(
(
S
n
n
to obtain the voltage change that occurs during t
n
+
n
1
n
e
n
n
⎛
⎝
⎛
⎝
S
c
S
------ -
S
⎛
⎝
⎛
⎝
and S
+
(
is the change in the current feedback signal during
is the slope of the sawtooth signal and t
is slope of the external ramp and:
n
1
-- -
π
1
-- -
π
1 D
e
n
S
1
+
+
–
1
e
0.5
0.5
)t
) 0.5
e
SW
⎞
⎠
⎞
⎠
–
are the on-time slopes of the current ramp
------------ - 1
1 D
------------ - 1
1 D
e
1
–
1
–
is the voltage that must be added by the
=
)
------------------------- -
m
–
–
c
S
⎞
⎠
⎞
⎠
1
n
t
SW
14
SW
e
m
yields
(EQ. 13)
(EQ. 15)
(EQ. 10)
(EQ. 12)
(EQ. 14)
(EQ. 11)
,
is the
ON
.
ISL6742
V
transducer components, and output inductance yielding
Equation 16:
where R
current transformer turns ratio, L
V
and primary turns, respectively.
The current sense signal, which represents the inductor
current after it has been reflected through the isolation and
current sense transformers, and passed through the current
sense burden resistor, is expressed in Equation 17:
where V
and I
Since the peak current limit threshold is 1V, the total current
feedback signal plus the external ramp voltage must sum to
this value when the output load is at the current limit
threshold.
Substituting Equations 16 and 17 into Equation 18 and
solving for R
For simplicity, idealized components have been used for this
discussion, but the effect of magnetizing inductance must be
considered when determining the amount of external ramp
to add. Magnetizing inductance provides a degree of slope
compensation and reduces the amount of external ramp
required. The magnetizing inductance adds primary current
in excess of what is reflected from the inductor current in the
secondary.
where V
cycle D and Lm is the primary magnetizing inductance. The
effect of the magnetizing current at the current sense
resistor, R
V
V
V
R
Δ
ΔV
n
O
I
e
CS
e
CS
P
CS
can be solved for in terms of input voltage, current
+
=
is the output voltage, and N
=
V
O
=
=
t
--------------------------------------- -
CS
SW
V
-----------------------------
=
is the output current at current limit.
N
------------------------ I
N
N
----------------------- -
IN
CS
IN
CS
N
ΔI
------------------------- -
S
P
P
=
⋅
CT
CS
L
N
⋅
⋅
⋅
⋅
P
V
is the input voltage that corresponds to the duty
Dt
N
m
R
N
is the voltage across the current sense resistor
N
is the current sense burden resistor, N
S
1
O
CS
⋅
CT
, is expressed in Equation 21:
⋅
CS
CT
CT
SW
R
L
⋅
CS
R
O
⎛
⎜
⎝
yields Equation 19:
⋅
CS
--------------------------------------------------- -
I
O
O
+
⋅
+
N
------- -
N
D t ⋅
------------------ - V
V
------- - t
A
L
S
P
2L
V
O
O
⎛
⎝
SW
1
-- -
π
O
SW
1
+
⎛
⎜
⎝
D 0.5
⎛
⎝
1
-- -
π
–
IN
+
S
O
⋅
D
--- -
2
and N
N
------- -
N
⎞
⎠
⎞
⎠
is the output inductance,
S
P
–
V
P
O
Ω
V
⎞
⎟
⎠
are the secondary
⎞
⎟
⎠
V
October 31, 2008
CT
(EQ. 16)
(EQ. 17)
(EQ. 21)
(EQ. 19)
(EQ. 20)
(EQ. 18)
is the
FN9183.2