ISL6742AAZA Intersil, ISL6742AAZA Datasheet - Page 16
![IC CTRLR PWM DOUBLE ENDED 16QSOP](/photos/6/86/68635/20-16-qsop_sml.jpg)
ISL6742AAZA
Manufacturer Part Number
ISL6742AAZA
Description
IC CTRLR PWM DOUBLE ENDED 16QSOP
Manufacturer
Intersil
Datasheet
1.ISL6742AAZA.pdf
(18 pages)
Specifications of ISL6742AAZA
Pwm Type
Voltage/Current Mode
Number Of Outputs
4
Frequency - Max
2MHz
Duty Cycle
100%
Voltage - Supply
9 V ~ 16 V
Buck
No
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 105°C
Package / Case
16-QSOP
Frequency-max
2MHz
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISL6742AAZA-T
Manufacturer:
Intersil
Quantity:
2 000
Part Number:
ISL6742AAZA-T
Manufacturer:
INTERSIL
Quantity:
20 000
Figure 15 illustrates a master-slave current sharing method.
In parallel and redundant applications, the IShare signals
from each power supply are connected together. Each
power supply produces a voltage proportional to its average
output current on IOUT, and through limiting resistor R3, on
IShare. The unit with the highest IShare signal (and highest
output current) sources current onto the IShare Bus, and is
identified as the master unit. The units with lower IShare
signals do not source current onto IShare, and are identified
as slave units. Each slave unit compares the master’s
IShare signal with its own, and if there is sufficient difference,
turns Q1 on, which pulls down on the feedback voltage.
Reducing the feedback voltage causes the output voltage to
appear low; the feedback loop compensates by increasing
the output voltage, and the output current increases. Each
slave unit will increase its output voltage until its output
current is nearly equal to that of the master.
The difference between the master’s output current and that of
a slave unit is set by R1 and R2. Some difference is required to
prevent undesirable switching of master and slave roles. This
difference also prevents operation of the current sharing
circuitry when a power supply is operating stand alone.
The maximum output voltage that a slave can induce in its
output is controlled by R6 and the output voltage feedback
divider. Typically, the maximum allowed output voltage
increase is limited to a few percent, but must be greater than
the tolerance of the feedback and reference components and
any distribution drops between units. If remote sensing is
used, the adjustment range must also include the difference in
FIGURE 15. MASTER-SLAVE CURRENT SHARING USING
U2A
+
-
1
2
3
4
5
6
7
8
CS
IOUT
AVERAGE CURRENT
ISL6742
(>>R3)
U1
R4
S&H
4x
VDD
AMPLIFIER INVERTING (-)
VOLTAGE ERROR
16
15
14
13
12
11
10
9
DISCONNECT IF P/S FAILS
R3
R1
OR IS TURNED OFF
INPUT
16
(>>R1)
R2
(>>R1)
BIAS
U2B
C1
R5
-
+
R6
FEEDBACK
Q1
VOLTAGE
OUTPUT
DIVIDER
ISHARE
R7
VOUT
ISL6742
distribution drops between the power supply outputs and the
remote sensing location. The current limit circuit must limit the
voltage change to less than the output overvoltage threshold
or an overvoltage condition can be induced.
Amplifier U2A sets the scaling factor from IOUT to IShare
and increases the current sourcing capability of IShare. U2B
is a low bandwidth amplifier that sets the frequency
response and gain of the current share circuitry. The current
share bandwidth must be much lower than the voltage
feedback loop bandwidth to ensure overall stability. The gain
is set by R1 and R5, and the bandwidth by R5 and C1.
The disconnect in series with IShare may be omitted for
power systems that do not require fault isolation. The
disconnect switch is normally implemented with MOSFET or
JFET devices.
Average Current Mode Control
The average current signal produced on IOUT may also be
used for average current mode control rather than peak
current mode control. There are many advantages to
average current mode control, most notably, improved noise
immunity and greater design flexibility of the current
feedback loop compensation. Figure 16 portrays the
concept.
Instead of being compared to a peak current sense signal as
it would be in a peak current mode control configuration, the
voltage amplifier output is integrated against the average
output current. The voltage loop compensation and the
current loop compensation may be adjusted independently.
The voltage error amplifier programs the average output
current of the supply, and its maximum output level
determines the maximum output current. Either IOUT or the
voltage EA output must be scaled appropriately to achieve
the desired current limit setpoint. The offset voltage shown in
Figure 16 must be provided to compensate for input offset
voltage of the current amplifier to ensure that zero duty cycle
operation is achievable.
Depending on the performance requirements of the control
loop, compensation networks other than shown may be
required.
VERR
FIGURE 16. AVERAGE CURRENT MODE CONTROL
AMPLIFIER
CURRENT
ERROR
C2
U2
+
-
R3
R4
OFFSET
VOLTAGE ERROR
IOUT
AMPLIFIER
R2
U1
+
-
C1
VOUT
REF
October 31, 2008
FN9183.2
R1
Rb