ISL6308IRZ-T Intersil, ISL6308IRZ-T Datasheet - Page 16

• Manufacturer Part Number: ISL6308IRZ-T
• Description: IC CTRLR PWM 3PHASE BUCK 40-QFN
• Manufacturer: Intersil

Specifications of ISL6308IRZ-T

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 275kHz
• Duty Cycle: 66.6%
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-VFQFN, 40-VFQFPN
• Frequency-max: 275kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

followed by a linear ramp with a rate determined by the
switching period, 1/F
For example, a regulator with 450kHz switching frequency
having REF voltage set to 1.2V has t
A 100mV offset exists on the remote-sense amplifier at the
beginning of soft-start and ramps to zero during the first 640
cycles of soft-start (704 cycles following enable). This
prevents the large inrush current that would otherwise occur
should the output voltage start out with a slight negative
bias.
The ISL6308 also has the ability to start-up into a pre-charged
output as shown in Figure 12, without causing any
unnecessary disturbance. The FB pin is monitored during
soft-start, and should it be higher than the equivalent internal
ramping reference voltage, the output drives hold both
MOSFETs off. Once the internal ramping reference exceeds
the FB pin potential, the output drives are enabled, allowing
the output to ramp from the pre-charged level to the final level
dictated by the reference setting. Should the output be
pre-charged to a level exceeding the reference setting, the
output drives are enabled at the end of the soft-start period,
leading to an abrupt correction in the output voltage down to
the “reference set” level.
Fault Monitoring and Protection
The ISL6308 actively monitors output voltage and current to
detect fault conditions. Fault monitors trigger protective
measures to prevent damage to the load.
t
SS
GND>
GND>
FIGURE 12. SOFT-START WAVEFORMS FOR ISL6308-BASED
=
64
------------------------------------------- -
OUTPUT PRECHARGED
+
BELOW DAC LEVEL
DAC
F
OUTPUT PRECHARGED
SW
MULTI-PHASE CONVERTER
ABOVE DAC LEVEL
⋅
1280
T1
T2
sw
.
16
T3
SS
equal to 3.55ms.
V
OUT
ENLL (5V/DIV)
(0.5V/DIV)
(EQ. 12)
ISL6308
One common power-good indicator is provided for linking to
external system monitors. The schematic in Figure 13
outlines the interaction between the fault monitors and the
power-good signal
Power-Good Signal
The power-good pin (PGOOD) is an open-drain logic output
that transitions high when the converter is operating after
soft-start. PGOOD pulls low during shutdown and releases
high after a successful soft-start. PGOOD transitions low
when an undervoltage, overvoltage, or overcurrent condition
is detected or when the controller is disabled by a reset from
ENLL or POR. If after an undervoltage or overvoltage event
occurs the output returns to within under and overvoltage
limits, PGOOD will return high.
Undervoltage Detection
The undervoltage threshold is set at 82% of the REF voltage.
When the output voltage (VSEN-RGND) is below the
undervoltage threshold, PGOOD gets pulled low. No other
action is taken by the controller. PGOOD will return high if the
output voltage rises above 85% of the REF voltage.
ISUM
VDIFF
VSEN
RGND
* CONNECT DROOP TO IREF
IREF
TO DISABLE THE DROOP FEATURE.
FIGURE 13. POWER-GOOD AND PROTECTION CIRCUITRY
V
DAC + 150mV
OVP
+1V
DROOP*
+
-
x1
0.82 x DAC
+
ISEN
-
+
-
ICOMP
V
DROOP
+
+
+
-
-
-
AND CONTROL LOGIC
UV
SOFT-START, FAULT
OV
ISL6308 INTERNAL CIRCUITRY
-
V
R
OC
OCSET
OCSET
+
100µA
OCSET
September 30, 2008
FN9208.4
PGOOD