ISL6741IB Intersil, ISL6741IB Datasheet - Page 16

• Manufacturer Part Number: ISL6741IB
• Description: IC CTRLR PWM DBL-ENDED 16-SOIC
• Manufacturer: Intersil

Specifications of ISL6741IB

• Pwm Type: Current Mode
• Number Of Outputs: 2
• Frequency - Max: 2MHz
• Duty Cycle: 100%
• Voltage - Supply: 9 V ~ 16 V
• Buck: No
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 16-SOIC (3.9mm Width)
• Frequency-max: 2MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

influenced by the lossiness of the core, core geometry,
operating ambient temperature, and air flow. The TDK
datasheet for PC44 material indicates a core loss factor of
~400mW/cm
excitation. The application uses a 235kHz square wave
excitation, so no direct comparison between the application
and the data can be made. Interpolation of the data is
required. The core volume is approximately 1.6cm
estimated core loss is
1.28W of dissipation is significant for a core of this size.
Reducing the flux density to 1200 gauss will reduce the
dissipation by about the same percentage, or 40%.
Ultimately, evaluation of the transformer’s performance in
the application will determine what is acceptable.
From Faraday’s Law and using 1200 gauss peak flux density
(ΔB = 2400 gauss or 0.24 tesla)
Rounding up yields 4 turns for the primary winding. The peak
flux density using 4 turns is ~1100 gauss. From Equation 1,
the number of secondary turns is 2.
The volts/turn for this design ranges from 5.4V at V
to 6.6V at V
(SR) windings may be set at 1 turn each with proper FET
selection. Selecting 2 turns for the synchronous rectifier
windings would also be acceptable, but the gate drive losses
would increase.
The next step is to determine the equivalent wire gauge for
the planar structure. Since each secondary winding
conducts for only 50% of the period, the RMS current is
where D is the duty cycle. Since an FR-4 PWB planar
winding structure was selected, the width of the copper
traces is limited by the window area width, and the number
of layers is limited by the window area height. The PQ core
selected has a usable window area width of 0.165 inches.
Allowing one turn per layer and 0.020 inches clearance at
the edges allows a maximum trace width of 0.125 inches.
Using 100 circular mils(c.m.)/A as a guideline for current
density, and from Equation 17, 707c.m. are required for each
of the secondary windings (a circular mil is the area of a
circle 0.001 inches in diameter). Converting c.m. to square
mils yields 555mils
P
I
N
RMS
loss
=
----------------------------- -
2 A
V
≈
=
•
IN
---------- - cm
cm
mW
I
OUT
•
e
3
T
•
IN
•
ON
3
ΔB
•
with a ±2000 gauss 100kHz sinusoidal
= 53V. Therefore, the synchronous rectifier
3
=
D
•
---------------------------------------------------- -
2 6.2 10
2
=
---------------
f
meas
•
f
(0.785 sq. mils/c.m.). Dividing by the
act
10
53 2 10
•
•
•
=
0.5
0.4 1.6
•
16
–
5
=
•
•
–
6
0.24
7.07
•
200kHz
-------------------- -
100kHz
=
3.56
A
=
1.28
turns
3
IN
, so the
(EQ. 16)
ISL6740, 1SL6741
(EQ. 17)
(EQ. 15)
= 43V
W
trace width results in a copper thickness of 4.44 mils
(0.112mm). Using 1.3 mils/oz. of copper requires a copper
weight of 3.4oz. For reasons of cost, 3oz. copper was
selected.
One layer of each secondary winding also contains the
synchronous rectifier winding. For this layer the secondary
trace width is reduced by 0.025 inches to 0.100 inches(0.015
inches for the SR winding trace width and 0.010 inches
spacing between the SR winding and the secondary
winding).
The choice of copper weight may be validated by calculating
the DC copper losses of the secondary winding as follows.
Ignoring the terminal and lead-in resistance, the resistance
of each layer of the secondary may be approximated using
Equation 18.
where
R = Winding resistance
ρ = Resistivity of copper = 669e-9Ω-inches at 20°C
t = Thickness of the copper (3 oz.) = 3.9e-3 inches
r
inches
r
The winding without the SR winding on the same layer has a
DC resistance 2.21mΩ. The winding that shares the layer
with the SR winding has a DC resistance of 2.65mΩ. With
the secondary configured as a 4 turn center tapped winding
(2 turns each side of the tap), the total DC power loss for the
secondary at +20°C is 486mW.
The primary windings have an RMS current of approximately
5A (I
configured as 2 layers, 2 turns per layer to minimize the
winding stack height. Allowing 0.020 inches edge clearance
and 0.010 inches between turns yields a trace width of
0.0575 inches. Ignoring the terminal and lead-in resistance,
and using Equation 18, the inner trace has a resistance of
4.25mΩ, and the outer trace has a resistance of 5.52mΩ.
The resistance of the primary then is 19.5mΩ at +20°C. The
total DC power loss for the secondary at +20°C is 489mW.
Improved efficiency and thermal performance could be
achieved by selecting heavier copper weight for the windings.
Evaluation in the application will determine its need.
R
2
1
= Outside radius of the copper trace = 0.324 or 0.299
= Inside radius of the copper trace = 0.199 inches
=
OUT
----------------------- -
t
•
2πρ
ln
⎛ ⎞
⎜ ⎟
⎝ ⎠
x N
r
---- -
r
2
1
S
/N
P
Ω
at ~ 100% duty cycle). The primary is
July 13, 2007
(EQ. 18)
FN9111.4