ISL6336BIRZ Intersil, ISL6336BIRZ Datasheet - Page 21

• Manufacturer Part Number: ISL6336BIRZ
• Description: IC CTRLR PWM SYNC BUCK 48-QFN
• Manufacturer: Intersil

Specifications of ISL6336BIRZ

• Applications: Controller, Intel VR11.1
• Voltage - Input: 3 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 ~ 1.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IMON to offset for the tolerance at the maximum IMON
voltage value. This can be done by connecting a resistor
from the IMON pin to VCC as shown in Figure 11. The
required value for R
Equation 18:
where R
is the desired offset voltage at V
is the voltage at IMON at the maximum load current.
For example, if the maximum IMON voltage is 900mV at full
load and the required offset voltage is 50mV and R
10kΩ then R
connected to GND near the load to increase accuracy.
Fault Monitoring and Protection
The ISL6336B actively monitors output voltage and current to
detect fault conditions. Fault monitors trigger protective
measures to prevent damage to a microprocessor load. One
common power good indicator is provided for linking to external
system monitors. The schematic in Figure 12 outlines the
interaction between the fault monitors and the VR_RDY signal.
R
VDIFF
VCC
FIGURE 12. VR_RDY AND PROTECTION CIRCUITRY
NEAR LOAD GND
DAC
=
50%
EXTERNAL CIRCUIT
C
IMON
VID + 0.175V
R
-------------------------------------------------------------------------------------------------------------------- -
IMON
R
IMON
R
UV
IMON
VCC
FIGURE 11. IMON RESISTOR DIVIDER
VCC
is the resistor from IMON to GND, V
V
⋅
CC
(
should be 810kΩ. R
VCC V
+
-
V
+
VCC
-
AND CONTROL LOGIC
IMON
IMON
OV
SOFT-START, FAULT
–
V
can be determined by using
IMONOFS
IMONOFS
21
ISL6336B
INTERNAL CIRCUIT
IMONMAX
–
V
IMON
IMONMAX
I
AVG
, and V
OC
should be
+
-
OC
)
IMONMAX
+
-
IMONOFS
IMON
1.11V
I
VR_RDY
MON
(EQ. 18)
105µA
I
AVG
is
ISL6336B
VR_RDY Signal
The VR_RDY pin is an open-drain logic output to indicate
that the soft-start period is completed and the output voltage
is within the regulated range. VR_RDY is pulled low during
shutdown and releases high after a successful soft-start and
a fixed delay time, t
low when an undervoltage, overvoltage, or overcurrent
condition is detected, or if the controller is disabled by a
reset from EN_PWR, EN_VTT, POR, or VID OFF-code.
Undervoltage Detection
The undervoltage threshold is set at 50% of the VID voltage.
When the output voltage at VSEN is below the undervoltage
threshold, VR_RDY gets pulled low. When the output voltage
comes back to 60% of the VID voltage, VR_RDY will return
back to high.
Overvoltage Protection
Regardless of the VR being enabled or not, the ISL6336B
overvoltage protection (OVP) circuit will be active after its
POR. The OVP thresholds are different under different
operation conditions. When VR is not enabled and before the
2nd soft-start, the OVP threshold is 1.275V. Once the
controller detects a valid VID input, the OVP trip point will be
changed to the VID voltage plus 175mV.
Two actions are taken by the ISL6336B to protect the
microprocessor load when an overvoltage condition occurs.
At the inception of an overvoltage event, all PWM outputs are
commanded low instantly (in less than 20ns). This causes the
Intersil drivers to turn on the lower MOSFETs and pull the
output voltage down to avoid damaging the load. When the
voltage at VDIFF falls below the DAC plus 75mV, PWM
signals enter a high-impedance state. The Intersil drivers
respond to the high-impedance input by turning off both upper
and lower MOSFETs. If the overvoltage condition reoccurs,
the ISL6336B will again command the lower MOSFETs to turn
on. The ISL6336B will continue to protect the load in this
fashion as long as the overvoltage condition occurs.
Once an overvoltage condition is detected, normal PWM
operation ceases until the ISL6336B is reset. Cycling the
voltage on EN_PWR, EN_VTT or VCC below the POR-
falling threshold will reset the controller. Cycling the VID
codes will not reset the controller.
Overcurrent Protection
ISL6336B has two levels of overcurrent protection. Each
phase is protected from a sustained overcurrent condition by
limiting its peak current, while the combined phase currents
are protected on an instantaneous basis.
In instantaneous protection mode, the ISL6336B utilizes the
sensed average current I
condition. See “Channel-Current Balance” on page 15 for
more detail on how the average current is measured. The
average current is continually compared with a constant
105µA reference current, as shown in Figure 12. Once the
D5
(see Figure 9). VR_RDY will be pulled
AVG
to detect an overcurrent
August 31, 2010
FN6696.2