S-1701A3327-U5T1G Seiko Instruments, S-1701A3327-U5T1G Datasheet - Page 42
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S-1701A3327-U5T1G
Manufacturer Part Number
S-1701A3327-U5T1G
Description
IC DETECT/REG 400MA 3.3V SOT89-5
Manufacturer
Seiko Instruments
Datasheet
1.S-1701A1815-M5T1G.pdf
(71 pages)
Specifications of S-1701A3327-U5T1G
Applications
Converter, Battery Powered Devices
Voltage - Input
2 ~ 6.5 V
Number Of Outputs
1
Voltage - Output
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-89-5
Polarity
Positive
Input Voltage Max
6.5 V
Output Voltage
3.3 V
Output Type
Fixed
Dropout Voltage (max)
0.21 V at 100 mA
Output Current
0.4 A
Line Regulation
0.2 % / V
Load Regulation
40 mV
Voltage Regulation Accuracy
1 %
Maximum Power Dissipation
1000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
42
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR WITH RESET FUNCTION
S-1701 Series
Detector block
1. Basic operation
Figure 36 shows a block diagram of the detector block.
(1) When the SENSE voltage (V
(2) When V
(3) When V
(4) V
(5) In the S-1701 Series, the detection voltage can be set within the range of 1.5 V to 5.5 V (operating voltage range:
(high) is output.
When the V
transistor N1 in Figure 36 becomes ON, and the comparator input voltage is changed to
becomes V
surpasses −V
Nch transistor becomes OFF and V
0.8 V to 6.5 V).
(R
SS
b
+R
R
is output when V
a
+R
c
) • V
SENSE
IN
b
+R
falls below the minimum operating voltage, the output becomes undefined. In this case the output
IN
Current
supply
SENSE
SENSE
c
*1. Parasitic diode
because it is pulled up.
DET
goes below +V
, as long as it does not exceed the release voltage +V
.
falls below −V
Since the Nch transistor N1 in Figure 36 is OFF, the comparator input voltage is
IN
rises above the minimum operating voltage. The V
V
V
SENSE
DET
V
IN
ref
SS
, V
DET
) is higher than the release voltage (+V
IN
R
R
R
IN
Figure 36 Block Diagram (Detector Block)
V
, the Nch transistor becomes ON and V
a
b
is output. V
c
SENSE
+
−
is output, as long as V
Seiko Instruments Inc.
N1
IN
at the VDOUT pin is delayed for t
Delay circuit
SENSE
remains above the detection voltage (−V
DET
Nch
DET
SS
. When V
), the Nch transistor is OFF and V
level still appears even when V
SS
is output. At this time, the Nch
D
SENSE
due to the delay circuit.
*1
R
b
R
rises above +V
• V
a
+R
SENSE
b
VDOUT
Rev.3.0
.
DET
SENSE
_00
, the
DET
IN
).