L6731D STMicroelectronics, L6731D Datasheet - Page 6

• Manufacturer Part Number: L6731D
• Description: IC CTRLR ADJ STPDN SYNC 16-TSSOP
• Manufacturer: STMicroelectronics

Specifications of L6731D

• Applications: Controller, DDR
• Voltage - Input: 1.8 ~ 14 V
• Number Of Outputs: 1
• Voltage - Output: Adjustable down to 0.6V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
• Output Voltage: 0.6 V to 18 V
• Output Current: 30 A
• Input Voltage: 1.8 V to 14 V
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Package: HTSSOP16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin connections and functions
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Pin connections and functions
Figure 2.
Table 4.
Pin n.
1
2
3
4
5
6
7
PGOOD
Pin connection (top view)
Pin functions
DDR-IN
SS/INH
V
COMP
SGND
Name
TTREF
FB
This pin is an open collector output and it is pulled low if the output voltage
is not within the specified thresholds (90 %-110 %). If not used it may be left
floating. Pull-up this pin to V
signal.
This pin is connected to the output of an internal buffer that provides ½ of
DDR-IN. This pin can be connected to the V
memory itself. Filter to GND with 10 nF capacitor.
All the internal references are referred to this pin.
This pin is connected to the error amplifier inverting input. Connect it to
V
output voltage in order to manage the over voltage conditions and the
PGood signal.
This pin is connected to the error amplifier output and is used to
compensate the voltage control feedback loop.
The soft-start time is programmed connecting an external capacitor from
this pin and GND. The internal current generator forces a current of 10 µA
through the capacitor. When the voltage at this pin is lower than 0.5 V the
device is disabled.
By setting the voltage at this pin is possible to select the internal/external
reference and the switching frequency:
V
V
V
An internal clamp limits the maximum V
captures the analog value present at this pin at the start-up when V
meets the UVLO threshold.
VTTREF
PGOOD
OUT
EAREF
EAREF
EAREF
DDR-IN
SS/INH
SGND
COMP
OCL
through the compensation network. This pin is also used to sense the
FB
= 80 %-95 % of V
0-80 % of V
= 95 %-100 % of V
7
8
1
2
3
4
5
6
HTSSOP16
CCDR
CCDR
-> External reference/F
CCDR ->
CCDR
14
13
12
11
10
15
16
-> V
9
Function
with a 10 K resistor to obtain a logical
V
REF
REF
VCC
EAREF
= 0.6 V/F
VCCDR
LGATE
BOOT
HGATE
PHASE
OCH
PGND
= 0.6 V/F
TTREF
at 2.5 V (typ.). The device
SW
SW
SW
input of the DDR
= 250 kHz
= 500 kHz
= 250 kHz
L6731D
CC