ISL62881CHRTZ Intersil, ISL62881CHRTZ Datasheet - Page 16

• Manufacturer Part Number: ISL62881CHRTZ
• Description: IC REG PWM SGL PHASE 28TQFN
• Manufacturer: Intersil

Specifications of ISL62881CHRTZ

• Applications: Controller, Intel IMVP-6.5™
• Voltage - Input: 4.5 ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 0.0125 ~ 1.5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 28-VQFN
• For Use With: ISL62881CCPUEVAL2Z - EVAL BOARD ISL62881CCPU 28QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

the gain set by resistor R
load line implementation, current monitor and
overcurrent protection.
Figure 12 shows the load line implementation. The
ISL62881C drives a current source I
pin, described by Equation 1.
When using inductor DCR current sensing, a single NTC
element is used to compensate the positive temperature
coefficient of the copper winding thus sustaining the load
line accuracy with reduced cost.
I
voltage drop as shown in Equation 2.
V
line. Changing R
the load line slope. Since I
protection level, it is recommended to first scale I
based on OCP requirement, then select an appropriate
R
Differential Sensing
Figure 12 also shows the differential voltage sensing
scheme. VCC
voltage sensing signals from the processor die. A unity
gain differential amplifier senses the VSS
and adds it to the DAC output. The error amplifier
regulates the inverting and the non-inverting input
voltages to be equal, therefore:
Rewriting Equation 3 and substituting Equation 2 gives:
Equation 4 is the exact equation required for load line
implementation.
The VCC
processor die. The feedback will be open circuit in the
absence of the processor. As shown in Figure 12, it is
recommended to add a “catch” resistor to feed the VR
local output voltage back to the compensator, and add
another “catch” resistor to connect the VR local output
ground to the RTN pin. These resistors, typically
10Ω~100Ω, will provide voltage feedback if the system is
powered up without a processor installed.
CCM Switching Frequency
The R
sets the VW windows size, which therefore sets the
switching frequency. When the ISL62881C is in
continuous conduction mode (CCM), the switching
frequency is not absolutely constant due to the nature of
the R
Modulator” on page 12, the effective switching frequency
VCC
V
VCC
droop
I
droop
droop
droop
droop
SENSE
SENSE
3™
FSET
flows through resistor R
=
=
is the droop voltage required to implement load
value to obtain the desired load line slope.
SENSE
modulator. As explained in “Multiphase R3™
2xV
----------------- -
R
droop
+
resistor between the COMP and the VW pins
–
R
V
i
VSS
Cn
SENSE
droop
and VSS
×
droop
SENSE
I
droop
=
and VSS
V
or scaling I
DAC
=
SENSE
i
. The current source is used for
V
16
droop
+
DAC
VSS
SENSE
droop
–
signals come from the
also sets the overcurrent
SENSE
R
droop
droop
are the remote
droop
and creates a
×
can both change
I
droop
SENSE
ISL62881C, ISL62881D
ISL62881C, ISL62881D
out of the FB
voltage
droop
(EQ. 1)
(EQ. 2)
(EQ. 3)
(EQ. 4)
CONFIGURATION DPRSLPVR
CPU VR Application
GPU VR Application
will increase during load insertion and will decrease
during load release to achieve fast response. On the
other hand, the switching frequency is relatively constant
at steady state. Variation is expected when the power
stage condition, such as input voltage, output voltage,
load, etc. changes. The variation is usually less than 15%
and doesn’t have any significant effect on output voltage
ripple magnitude. Equation 5 gives an estimate of the
frequency-setting resistor R
approximately 300kHz switching frequency. Lower
resistance gives higher switching frequency.
Modes of Operation
Table 2 shows the ISL62881C operational modes,
programmed by the logic status of the DPRSLPVR pin.
The ISL62881C enters 1-phase DE mode when there is
DPRSLPVR = 1.
When the ISL62881C is configured for GPU VR
application, DPRSLPVR logic status also controls the
output voltage slew rate. The slew rate is 5mV/µs for
DPRSLPVR = 0 and is 10mV/µs for DPRSLPVR = 1.
Dynamic Operation
When the ISL62881C is configured for CPU VR
application, it responds to VID changes by slewing to the
new voltage at 5mV/µs slew rate. As the output
approaches the VID command voltage, the dv/dt
moderates to prevent overshoot. Geyserville-III
transitions commands one LSB VID step (12.5mV) every
2.5µs, controlling the effective dv/dt at 5mv/µs. The
ISL62881C is capable of 5mV/µs slew rate.
When the ISL62881C is configured for GPU VR
application, it responds to VID changes by slewing to the
new voltage at a slew rate set by the logic status on the
DPRSLPVR pin. The slew rate is 5mV/µs when
DPRSLPVR = 0 and is 10mV/µs when DPRSLPVR = 1.
When the ISL62881C is in DE mode, it will actively drive
the output voltage up when the VID changes to a higher
value. It’ll resume DE mode operation after reaching the
new voltage level. If the load is light enough to warrant
DCM, it will enter DCM after the inductor current has
crossed zero for four consecutive cycles. The ISL62881C
will remain in DE mode when the VID changes to a lower
value. The output voltage will decay to the new value and
the load will determine the slew rate.
During load insertion response, the Fast Clock function
increases the PWM pulse response speed. The
R
FSET
TABLE 2. ISL62881C MODES OF OPERATION
(
kΩ
)
=
(
Period μs
(
0
1
0
1
) 0.29
–
fset
OPERATIONAL
)
1-phase CCM
1-phase CCM
×
1-phase DE
1-phase DE
value. 8kΩ R
2.65
MODE
FSET
SLEW RATE
VOLTAGE
10mV/µs
March 8, 2010
5mV/µs
5mV/µs
gives
FN7596.0
(EQ. 5)