ISL6237IRZ Intersil, ISL6237IRZ Datasheet - Page 34

IC MAIN PWR CTRLR QUAD 32-QFN

ISL6237IRZ

Manufacturer Part Number
ISL6237IRZ
Description
IC MAIN PWR CTRLR QUAD 32-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6237IRZ

Applications
Controller, Notebook Computers
Voltage - Input
5.5 ~ 25 V
Number Of Outputs
4
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-

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• Use a star ground connection on the power plane to
• Keep the high-current paths short, especially at the
• Keep the power traces and load connections short. This
• PHASE_ (ISL6237) and GND connections to the
• When trade-offs in trace lengths must be made, it is
• Ensure that the OUT_ connection to COUT_ is short and
• Route high-speed switching nodes (BOOT_, UGATE_,
• Make all pin-strap control input connections (SKIP, ILIM_,
Layout Procedure
Place the power components first with ground terminals
adjacent (Q
all these connections on the top layer with wide, copper-filled
areas.
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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
minimize the crosstalk between OUT1 and OUT2.
ground terminals. This practice is essential for stable,
jitter-free operation.
practice is essential for high efficiency. Using thick copper
PC boards (2oz vs 1oz) can enhance full-load efficiency
by 1% or more. Correctly routing PC board traces must be
approached in terms of fractions of centimeters, where a
single mΩ of excess trace resistance causes a
measurable efficiency penalty.
synchronous rectifiers for current limiting must be made
using Kelvin-sense connections to guarantee the
current-limit accuracy with 8-pin SO MOSFETs. This is
best done by routing power to the MOSFETs from outside
using the top copper layer, while connecting PHASE_
traces inside (underneath) the MOSFETs.
preferable to allow the inductor charging path to be made
longer than the discharge path. For example, it is better to
allow some extra distance between the input capacitors
and the high-side MOSFET than to allow distance
between the inductor and the synchronous rectifier or
between the inductor and the output filter capacitor.
direct. However, in some cases it may be desirable to
deliberately introduce some trace length between the
OUT_ connector node and the output filter capacitor.
PHASE_, and LGATE_) away from sensitive analog areas
(REF, ILIM_, and FB_). Use PGND1 and PGND2 as an
EMI shield to keep radiated switching noise away from the
IC's feedback divider and analog bypass capacitors.
etc.) to GND or VCC of the device.
2
/Q
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4
source, CIN_, COUT_). If possible, make
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34
ISL6237
Mount the controller IC adjacent to the synchronous rectifier
MOSFETs close to the hottest spot, preferably on the back
side in order to keep UGATE_, GND, and the LGATE_ gate
drive lines short and wide. The LGATE_ gate trace must be
short and wide, measuring 50 mils to 100 mils wide if the
MOSFET is 1” from the controller device.
Group the gate-drive components (BOOT_ capacitor, VIN
bypass capacitor) together near the controller device.
Make the DC/DC controller ground connections as follows:
On the board's top side (power planes), make a star ground
to minimize crosstalk between the two sides. The top-side
star ground is a star connection of the input capacitors and
synchronous rectifiers. Keep the resistance low between the
star ground and the source of the synchronous rectifiers for
accurate current limit. Connect the top-side star ground
(used for MOSFET, input, and output capacitors) to the small
island with a single short, wide connection (preferably just a
via). Create PGND islands on the layer just below the
top-side layer (refer to the ISL6237 EV kit for an example) to
act as an EMI shield if multiple layers are available (highly
recommended). Connect each of these individually to the
star ground via, which connects the top side to the PGND
plane. Add one more solid ground plane under the device to
act as an additional shield, and also connect the solid
ground plane to the star ground via.
Connect the output power planes (VCORE and system
ground planes) directly to the output filter capacitor positive
and negative terminals with multiple vias.
1. Near the device, create a small analog ground plane.
2. Connect the small analog ground plane to GND and use
3. Create another small ground island for PGND and use
4. Connect the GND and PGND planes together at the
the plane for the ground connection for the REF and VCC
bypass capacitors, FB dividers and ILIM resistors (if any).
the plane for the VIN bypass capacitor, placed very close
to the device.
metal tab under device.
March 18, 2008
FN6418.4

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