MCZ34702EWR2 Freescale Semiconductor, MCZ34702EWR2 Datasheet - Page 26

• Manufacturer Part Number: MCZ34702EWR2
• Description: IC PWR SUPPLY 3A SW 32-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ34702EWR2

• Applications: Controller, Power QUICC™ I, II
• Voltage - Input: 2.8 ~ 6 V
• Number Of Outputs: 2
• Voltage - Output: 7.75V, 0.8 ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-SOIC (7.5mm Width)
• Output Current: 3 A
• Input Voltage: 2.8 V to 6 V
• Switching Frequency: 300 KHz
• Mounting Style: SMD/SMT
• Duty Cycle (max): 95 %
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I
standard. SDA and SCL pins are the Serial Data and Serial
Clock pins of the I
I
Communication Start
the slave device unique address. The Read/Write (R/W) bit
defines whether the data should be read from or written to the
device (the 34702 operates only as a slave device; therefore,
the R/W bit should always be set to 0). The 34702 responds
by sending the Acknowledge bit (Ack) to the master device.
Figure 20
for a 7-bit slave address.
Slave Address Definition
defined by the state of the CLKSEL pin (A1) and the ADDR
pin (A0).
configuration of the oscillator synchronization CLKSYN pin.
Leaving the CLKSEL pin open or pulling it high defines the
CLKSYN pin as an oscillator output. When the CLKSEL pin
is pulled low, the CLKSYN pin is configured as a
synchronization input for the external clock signal.
in the same I
address bits. A different combination of the two LSB address
bits A1 and A0 can be assigned to each individual part to
26
34702
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
2
2
C BUS OPERATION
C COMMAND AND DATA FORMATS
Figure 20. Communication Start Using 7-Bit Address
1. LDO falls faster than VOUT . The VOUT uses control
2. VOUT falls faster than LDO. The LDO uses control
The 34702 device is compatible with the I
Communication starts with a START condition, followed by
34702 has the two least significant address bits (LSB)
Note The state of the CLKSEL pin also defines the
This feature allows up to four 34702 ICs to communicate
methods (4) and (5) described in the section
of Control on page
In the case VIN1 = VIN2, the intrinsic operation turns
on both the buck high side MOSFET and the LDO
external Pass MOSFET, and discharges the VOUT
load capacitor into the VIN supply.
methods (5) and (6) described in the section
of Control on page
illustrates the beginning of an I
S
2
C bus, all of them sharing the same high-order
2
C bus.
7-Bit Address
23.
23.
LOGIC COMMANDS AND REGISTERS
2
C communication
R/W
2
C interface
Ack
Methods
Methods
Shorted Load
assure its unique address.
addressing feature for a 7-bit address.
definition of the selectable portion of the device address.
ADDR pin to ground through a 10kΩ resistor.
Writing Data Into the Slave Device
can be written into the slave registers. The R/W bit must be
set to 0 to allow DATA to be written into the 34702.
shows the data write sequence. Actions performed by the
slave device are grayed.
Table 6.
(Write)
1. LDO shorted to ground. The VOUT uses methods (1)
2. VOUT shorted to ground. The LDO uses control
3. VIN1 shorted to ground. Device is not working.
4. VIN2 shorted to ground. This is equivalent to the
5. LDO shorted to supply. No load protection. 34702 is
6. VOUT shorted to supply. No load protection. 34702 is
When the ADDR pin is used and put to low level, pull the
After the address acknowledgment by the slave, DATA
S
Figure 21. Address Bit Definition for 7-Bit Address
CLKSEL Pin
High (Open)
High (Open)
and (2) described in the section
page
methods (5) and (6) described in the section
of Control on page
switcher V
protected by current limit and thermal shutdown.
protected by current limit and thermal shutdown.
Figure 22. Data Transfer for Write Operations
Low
Low
7-Bit Address
23.
Definition of Selectable Portion of Device
Address
OUT
MSB
6
1 1
output shorted to ground.
Fixed Address Selectable
High (Open)
High (Open)
Analog Integrated Circuit Device Data
ADDR Pin
5
23.
Low
Low
4
1
0
Figure 21
Bits
3
0 1 A1 A0
Ack
2
Freescale Semiconductor
illustrates the flexible
Address
Methods of Control on
1 0
Table 6
LSB
A1
0
0
1
1
DATA
provides the
Methods
Figure 22
A0
0
1
0
1
Ack