CS51413EDR8G ON Semiconductor, CS51413EDR8G Datasheet - Page 11

• Manufacturer Part Number: CS51413EDR8G
• Description: IC REG BUCK LV 1.5A SYNC 8SOIC
• Manufacturer: ON Semiconductor
• Type: Step-Down (Buck)r

Specifications of CS51413EDR8G

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Current - Output: 1.5A
• Frequency - Switching: 520kHz
• Voltage - Input: 4.5 ~ 40 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Mounting Style: SMD/SMT
• Primary Input Voltage: 40V
• No. Of Outputs: 1
• Output Current: 1.5A
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Current Rating: 1.5A
• Filter Terminals: SMD
• Input Voltage Primary Max: 40V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: CS51413EDR8GOS

circuit. If the pin is open, current source I1 flows into the
base of Q1, turning both Q1 and Q2 on. In turn, Q2 collector
current enables the various internal power rails. In
Figure 15(b), a standard logic gate is used to pull the pin low
by shunting I1 to ground, which places the IC in sleep
(shutdown) mode. Note that, when the gate output is logical
high, the voltage at the SHDNB pin will rise to the internal
clamp voltage of 8 V. This level exceeds the maximum
output rating for most common logic families. Protection
Zener diode Z1 permits the pin voltage to rise high enough
to enable the IC, but remain less than the gate output voltage
rating. In Figure 15(c), a single open-collector general-
purpose NPN transistor is used to pull the pin low. Since
transistors generally have a maximum collector voltage
rating in excess of 8 V, the protection Zener diode in
Figure 15(b) is not required.
Startup
the output capacitors to reach voltage regulation. This gives
rise to an excessive in−rush current which can be detrimental
to the inductor, IC and catch diode. In V
compensation capacitor provides Soft−Start with no need
for extra pin or circuitry. During the power up, the Output
Source Current of the error amplifier charges the
compensation capacitor which forces V
voltage ramp up gradually.
Figure 15. SHDNB pin equivalent internal circuit (a)
Figure 15(a) depicts the SHDNB pin equivalent internal
During power up, the regulator tends to quickly charge up
The Soft−Start duration can be calculated by
SHDNB
(a)
(b)
V
and practical interface examples (b), (c).
IN
2V to 5V
Z1
T SS +
20k
SHDNB
5mA
V C
D1
8V
I1
I SOURCE
0.65V
C COMP
Q1
(c)
C
pin and thus output
Q2
2
To internal
bias rails
control, the
SHDNB
http://onsemi.com
11
where:
5.0 ms which is adequate to avoid any current stresses.
Figure 16 shows the gradual rise of the V
of the V
after the output voltage reaches the regulation. If the supply
voltage rises slower than the V
overshoot.
Short Circuit
Threshold, the regulator reduces the peak current limit by
40% and switching frequency to 1/4 of the nominal
frequency. These features are designed to protect the IC and
external components during overload or short circuit
conditions. In those conditions, peak switching current is
clamped to the current limit threshold. The reduced
switching frequency significantly increases the ripple
current, and thus lowers the DC current. The short circuit can
cause the minimum duty cycle to be limited by Minimum
Output Pulse Width. The foldback frequency reduces the
minimum duty cycle by extending the switching cycle. This
protects the IC from overheating, and also limits the power
that can be transferred to the output. The current limit
foldback effectively reduces the current stress on the
inductor and diode. When the output is shorted, the DC
current of the inductor and diode can approach the current
limit threshold. Therefore, reducing the current limit by 40%
can result in an equal percentage drop of the inductor and
diode current. The short circuit waveforms are captured in
V
C
I
Using a 0.1 mF C
When the V
SOURCE
Figure 16. The Power Up Transition of CS5141X
COMP
C
= V
equal to error amplifier’s reference voltage.
SW
C
= Compensation capacitor connected to the V
pin steady−state voltage, which is approximately
= Output Source Current of the error amplifier.
during power up. There is no voltage overshoot
FB
COMP
pin voltage drops below Foldback
Regulator
, the calculation shows a T
C
pin, output voltage may
C
, V
O
and envelope
SS
C
over
pin