ADUM3400CRWZ Analog Devices Inc, ADUM3400CRWZ Datasheet - Page 7

• Manufacturer Part Number: ADUM3400CRWZ
• Description: IC DIGITAL ISOLATOR 4CH 16-SOIC
• Manufacturer: Analog Devices Inc
• Series: iCoupler®r

Specifications of ADUM3400CRWZ

• Propagation Delay: 27ns
• Inputs - Side 1/side 2: 4/0
• Number Of Channels: 4
• Isolation Rating: 2500Vrms
• Voltage - Supply: 2.7 V ~ 5.5 V
• Data Rate: 120Mbps
• Output Type: Logic
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Operating Temperature: -40°C ~ 105°C
• No. Of Channels: 4
• Supply Current: 72mA
• Supply Voltage Range: 2.7V To 5.5V
• Digital Ic Case Style: SOIC
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +105°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Parameter
1
2
3
4
5
6
7
8
The supply current values for all four channels are combined when running at identical data rates. Output supply current values are specified with no output load
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
t
measured from the 50% level of the rising edge of the V
t
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
CM
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information
on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating the per-channel supply current
for a given data rate.
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section.
See Figure 8 through Figure 10 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through
Figure 15 for total V
within the recommended operating conditions.
the isolation barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
that can be sustained while maintaining V
magnitude is the range over which the common mode is slewed.
PHL
PSK
ADuM340xBRW
ADuM340xCRW
For All Models
H
is the magnitude of the worst-case difference in t
propagation delay is measured from the 50% level of the falling edge of the V
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching,
Channel-to-Channel Matching,
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching,
Channel-to-Channel Matching,
Output Disable Propagation Delay
Output Enable Propagation Delay
Output Rise/Fall Time (10% to 90%)
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
Opposing-Directional Channels
Codirectional Channels
Change vs. Temperature
Codirectional Channels
Change vs. Temperature
Opposing-Directional Channels
(High/Low-to-High Impedance)
Common-Mode Transient Immunity
(High Impedance-to-High/Low)
Common-Mode Transient Immunity
Refresh Rate
Input Dynamic Supply Current per Channel
Output Dynamic Supply Current per Channel
at Logic Low Output
at Logic High Output
DD1
and V
4
4
DD2
3
3
2
2
supply currents as a function of data rate for ADuM3400/ADuM3401/ADuM3402 channel configurations.
5
5
5
PLH
PLH
PLH
7
6
6
7
− t
− t
− t
PHL
PHL
PHL
6
O
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
|
|
|
4
4
4
6
6
PHL
or t
Ix
signal to the 50% level of the rising edge of the V
8
PLH
8
that is measured between units at the same operating temperature, supply voltages, and output load
Symbol
PWD
t
t
PW
t
PWD
t
t
t
PW
t
PWD
t
t
t
t
t
t
|CM
|CM
f
I
I
r
DDI (D)
DDO (D)
PSK
PSKCD/OD
PHL
PSK
PSKCD
PSKOD
PHL
PSK
PSKCD
PSKOD
PHZ
PZH
R
/t
, t
, t
F
, t
, t
H
L
|
|
PLH
PLH
PLH
PZL
Rev. A | Page 7 of 24
Min
10
20
90
20
25
25
Ix
signal to the 50% level of the falling edge of the V
O
> 0.8 V
Typ
38
5
8.3
120
34
0.5
3
6
6
3
35
35
1.1
0.10
0.03
ADuM3400/ADuM3401/ADuM3402
DD2
Ox
. CM
signal.
Max Unit
40
50
50
100
50
3
22
3
6
11.1 ns
45
2
16
2
5
8
8
L
is the maximum common-mode voltage slew rate
mA/Mbps
mA/Mbps
ns
ns
ns
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
ns
ns
kV/μs
kV/μs
Mbps
Test Conditions
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
V
transient magnitude = 800 V
V
transient magnitude = 800 V
Ix
Ix
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Ox
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= V
= 0 V, V
signal. t
DD1
/V
CM
PLH
DD2
= 1000 V,
propagation delay is
, V
CM
= 1000 V,