6N134/883B#200 Avago Technologies US Inc., 6N134/883B#200 Datasheet
6N134/883B#200
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6N134/883B#200 Summary of contents
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HCPL-563X, HCPL-663X, HCPL-565X, 5962-98001, HCPL-268K, HCPL-665X, 5962-90855, HCPL-560X Hermetically Sealed, High Speed, High CMR, Logic Gate Optocouplers Data Sheet *See matrix for available extensions. Description These units are single, dual and quad channel, hermeti- cally sealed optocouplers. The products are capable of operation and storage over the full military temperature range and can be purchased as either standard ...
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Each channel contains a GaAsP light emitting diode which is optically coupled to an integrated high speed photon detector. The output of the detector is an open collector Schottky clamped transistor. Internal shields provide a guaranteed common mode transient immuni- ty specification of 1000 V/µs. For Isolation Voltage appli- cations requiring up to 2500 Vdc, the HCPL-5650 family is also available. Package styles for these parts are 8 and 16 pin DIP through hole (case outlines P and E respectively), and 16 pin surface mount DIP flat pack (case outline F), leadless ceramic chip carrier (case outline 2). Devices may be purchased with a variety of lead bend and plat- ing options. See Selection Guide Table for details. Stan- dard Microcircuit Drawing (SMD) parts are available for each package and lead style. Selection Guide–Package Styles and Lead Configuration ...
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Functional Diagrams 16 Pin DIP 8 Pin DIP Through Hole Through Hole 2 Channels 1 Channel GND Note: All DIP and flat pack devices have common V package has isolated channels with separate V Outline Drawings 16 ...
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Outline Drawings (continued) 8 Pin DIP Through Hole, 1 and 2 Channels 9.40 (0.370) 9.91 (0.390) 0.76 (0.030) 1.27 (0.050) 4.32 (0.170) MAX. 0.51 (0.020) 3.81 (0.150) MIN. MIN. 0.51 (0.020) MAX. 2.29 (0.090) 2.79 (0.110) NOTE: DIMENSIONS IN MILLIMETERS ...
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Hermetic Optocoupler Options Option Description 100 Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option is available on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below for details). 0.51 (0.020) MIN. 0.51 (0.020) MIN. 2.29 (0.090) 2.79 (0.110) 200 Lead finish is solder dipped rather than gold plated. This option is available on commercial and hi-rel product in 8 and 16 pin DIP. DSCC Drawing part numbers contain provisions for lead finish. All leadless chip carrier devices are delivered with solder dipped terminals as a standard feature. 300 Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This option is avail- able on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below for details). This option has solder dipped leads. 0.51 (0.020) MIN. 0.51 (0.020) MIN. 2.29 (0.090) 2.79 (0.110) NOTE: DIMENSIONS IN MILLIMETERS ...
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Absolute Maximum Ratings No derating required up to +125°C. Parameter Storage Temperature Operating Temperature Case Temperature Junction Temperature Lead Solder Temperature Peak Forward Input Current (each channel, ≤1 ms duration) Average Input Forward Current (each channel) Input Power Dissipation (each channel) Reverse Input Voltage (each channel Supply Voltage (1 minute maximum) Output Current (each channel) Output Voltage (each channel) Output Power Dissipation (each channel) Package Power Dissipation (each channel) *Selection for higher output voltages available Single Channel Product Only Enable Input Voltage 8 Pin Ceramic DIP Single Channel Schematic ESD Classification (MIL-STD-883, Method 3015) HCPL-5600/01/0K 6N134, 6N134/883B, HCPL-5630/31/3K, HCPL-5650/51, HCPL-6630/31/3K and HCPL-6650/51/5K Recommended Operating ...
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Recommended Operating Conditions (cont’d.) Single Channel Product Only [10] Parameter High Level Enable Voltage Low Level Enable Voltage Electrical Characteristics (T = -55°C to +125°C, unless otherwise specified) A Parameter Symbol Test Conditions High Level Output Current I F Low Level Output Voltage I OL ...
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Electrical Characteristics, (cont’ -55°C to +125°C unless otherwise specified A Parameter Symbol Test Conditions Propagation Delay PLH CC Time to High Output pF, L Level Propagation Delay t * PHL Time to Low Output Level Output Rise Time t R ...
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Notes: 1. Each channel. 2. All devices are considered two-terminal devices; I leads or terminals shorted together. 3. Measured between each input pair shorted together and all output connections for that channel shorted together. 4. Measured between adjacent input pairs ...
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D.U. PULSE I F GENERATOR Z = 50Ω INPUT GND MONITORING NODE INCLUDES PROBE AND STRAY WIRING CAPACITANCE. L Figure 4. Test Circuit for t and t ...
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PULSE GENERATOR = 50 Ω D.U. OUT GND * C INCLUDES PROBE AND L STRAY WIRING CAPACITANCE. Figure 8. Test Circuit for t ...
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MIL-PRF-38534 Class H, Class K, and DSCC SMD Test Program Avago’s Hi-Rel Optocouplers are in compliance with MIL-PRF-38534 Classes H and K. Class H and Class K devices are also in compliance with DSCC drawings 81028, 5962-90855 and 5962-98001. Testing ...