TLP3023(TP1,S,F,T) Toshiba, TLP3023(TP1,S,F,T) Datasheet - Page 67

• Manufacturer Part Number: TLP3023(TP1,S,F,T)
• Description: PHOTOCOUPLER TRIAC OUT 6-SOP
• Manufacturer: Toshiba

Specifications of TLP3023(TP1,S,F,T)

• Voltage - Isolation: 5000Vrms
• Number Of Channels: 1
• Voltage - Off State: 400V
• Output Type: AC, Triac, Standard
• Current - Gate Trigger (igt) (max): 5mA
• Current - Hold (ih): 600µA
• Current - Dc Forward (if): 20mA
• Current - Output / Channel: 100mA
• Mounting Type: Surface Mount
• Package / Case: 6-SMD (300 mil, 5 Leads)
• Output Device: PhotoTriac
• Isolation Voltage: 5000 V
• Peak Output Voltage (vdrm): 400 V
• Maximum Input Voltage: 120 VAC
• Maximum Output Voltage: 400 V
• Configuration: 1 Channel
• Maximum Continuous Output Current: 100 mA
• Maximum Input Current: 25 mA
• Maximum Operating Temperature: + 100 C
• Maximum Power Dissipation: 330 mW
• Maximum Reverse Diode Voltage: 5 V
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Zero-crossing Circuit: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TLP3023TP1SFTR

11
1
High Speed
Low Input Current Drive
No Pull-up Resistor Required
High V
Digital Interface Applications
5 V
5 V
5 V
5 V
CC
V
Photocoupler Application Circuit Examples
V
V
V
CC
CC
CC
CC
Tolerance
15 kΩ
2 kΩ
120 pF
LSTTL
LSTTL
CMOS
1.1 kΩ
4.7 kΩ
3 mA
7.5 mA
LSTTL
390 Ω
0.5 mA
1.6 mA
TLP118, TLP2601
TLP2200
TLP558
TLP553
V
V
V
CC
CC
CC
510 kΩ
0.1 μF
0.1 μF
V
V
R
CC
CC
L
LSTTL
CMOS
0.1 μF
= 5 V
= 20 V R
1 kΩ
6.8 kΩ
R
V
V
LSTTL
LSTTL
CC
CC
L
L
5 V
= 3 kΩ
= 12 kΩ
67
V
V
CC
CC
5 V
5 V
The TLP2601 allows high-speed data
transmission at up to approximately 5 MHz.
Data rate of left-side circuit
The high-CTR (current transfer ratio) TLP553
allows operation with low input current (0.5 mA)
and direct driving with a CMOS signal.
Data rate of left-side circuit
When the TLP2200 with a 3-state output is used,
the next-stage logic gate can be actuated
without using a pull-up resistor.
Data rate of left-side circuit
By using the TLP558 which tolerates V
20 V, CMOS logic gates and other components
can be driven without design restrictions on V
Data rate of left-side circuit
f (typ.): 5 Mbit/s (duty cycle ≅ 1/2)
f (typ.): 50 kbit/s (duty cycle ≅ 1/2)
f (typ.): 1 Mbit/s (duty cycle ≅ 1/2)
f (typ.): 1 Mbit/s (duty cycle ≅ 1/2)
CC
up to
CC
.