SDCFIF-001G-388 SanDisk, SDCFIF-001G-388 Datasheet - Page 49
![COMPACT FLASH IND 1GB FIXED](/photos/7/83/78341/mfg_sdcf_series_sml.jpg)
SDCFIF-001G-388
Manufacturer Part Number
SDCFIF-001G-388
Description
COMPACT FLASH IND 1GB FIXED
Manufacturer
SanDisk
Datasheet
1.SDCFCF-001G-388.pdf
(97 pages)
Specifications of SDCFIF-001G-388
Memory Size
1GB
Memory Type
CompactFLASH
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
585-1232
SDCFIF-001G-388
SDCFIF-001G-388
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SanDisk Industrial Grade CompactFlash 5000
4.5.9
These registers return the card status when read by the host. Reading the
Status Register clears a pending interrupt, while reading the Auxiliary Status
Register does not. The meaning of the status bits are described below:
© 2007 SanDisk® Corporation
D4
D3
D2
D1
D0
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Bit
BUSY
Status & Alternate Status Registers (Address–
1F7[177]&3F6[376]; Offsets 7 & Eh)
D7
DRV
HS3
HS2
HS1
HS0
Name
BUSY
RDY
DWF
DSC
DRQ
CORR
0
ERR
Name
RDY
D6
DRV is the drive number. When DRV=0, drive (card) 0 is selected When
DRV=1, drive (card) 1 is selected. The CompactFlash Card is set to be Card 0
or 1 using the copy field of the PCMCIA Socket & Copy configuration register.
When operating in the Cylinder, Head, Sector mode, this is bit 3 of the head
number. It is Bit 27 in the Logical Block Address mode.
When operating in the Cylinder, Head, Sector mode, this is bit 2 of the head
number. It is Bit 26 in the Logical Block Address mode.
When operating in the Cylinder, Head, Sector mode, this is bit 1 of the head
number. It is Bit 25 in the Logical Block Address mode.
When operating in the Cylinder, Head, Sector mode, this is bit 0 of the head
number. It is Bit 24 in the Logical Block Address mode.
Set when the CompactFlash Card has access to the command
buffer and registers and the host is prevented from accessing the
command register and buffer. No other bits in this register are valid
when this bit is set to 1.
RDY indicates whether the device is capable of performing card
operations. This bit is cleared at power-up and remains cleared
until card is ready to accept a command.
If set, indicates a write fault has occurred.
Set when the card is ready.
Set when the card requires informationto be transferred either to
or from the host through the Data Register.
Set when a correctable data error has been encountered and the
data has been corrected. This condition does not terminate a
multi-sector read operation.
Always set to 0.
Set when the previous command ended in some type of error. The
bits in the Error Register contain additional information describing
the error.
DWF
D5
DSC
D4
42
DRQ
Description
D3
Description
CORR
D2
D1
0
ERR
D0
Product Manual
July 2007
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