MT8VDDT6464HDY-335F2 Micron Technology Inc, MT8VDDT6464HDY-335F2 Datasheet - Page 9

• Manufacturer Part Number: MT8VDDT6464HDY-335F2
• Description: MODULE DDR 512MB 200-SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT8VDDT6464HDY-335F2

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 167MHz
• Package / Case: 200-SODIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 64b
• Organization: 64Mx64
• Total Density: 512MByte
• Chip Density: 512Mb
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 800mA
• Number Of Elements: 8
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1294; MT8VDDT6464HDY-335F2

I
Table 9:
PDF: 09005aef80765fab/Source: 09005aef806e1d28
DD8C32_64x64HD.fm - Rev. E 11/08 EN
Parameter/Condition
Operating one device bank active-precharge current:
t
clock cycle; Address and control inputs changing once every two clock cycles
Operating one device bank active-read-precharge current:
Burst = 4;
inputs changing once per clock cycle
Precharge power-down standby current: All device banks idle; Power-
down mode;
Idle standby current: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock cycle;
V
Active power-down standby current: One device bank active; Power-
down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank active;
t
per clock cycle; Address and other control inputs changing once per clock
cycle
Operating burst read current: Burst = 2; Continuous burst reads; One
device bank active; Address and control inputs changing once per clock cycle;
t
Operating burst write current: Burst = 2; Continuous burst writes; One
device bank active; Address and control inputs changing once per clock cycle;
t
Auto refresh burst current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank interleaving
reads; (burst = 4) with auto precharge,
Address and control inputs change only during active READ or WRITE
commands
DD
RC =
RC =
CK =
CK =
IN
= V
Specifications
t
t
t
t
RC (MIN);
RAS (MAX);
CK (MIN); Iout = 0mA
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
REF
t
for DQ, DQS, and DM
RC =
t
t
I
Values are for the MT46V16M16 DDR SDRAM only and are computed from values specified in the
256Mb (16 Meg x 16) component data sheet
CK =
CK =
DD
t
t
RC (MIN);
CK =
Specifications and Conditions – 256MB (Die Revision K)
t
Notes:
t
t
CK =
CK (MIN); CKE = (LOW)
CK (MIN); CKE = LOW
t
CK (MIN); DQ, DM, and DQS inputs changing once per
t
CK (MIN); DQ, DM, and DQS inputs changing twice
t
CK =
1. Value calculated as one module rank in this operating condition; all other module ranks are
2. Value calculated reflects all module ranks in this operating condition.
in I
t
CK (MIN); Iout = 0mA; Address and control
DD
2P (CKE LOW) mode.
t
RC =
t
256MB, 512MB (x64, DR): 200-Pin DDR SDRAM SODIMM
RC (MIN);
t
t
RFC =
RFC = 7.8125µs
t
CK =
t
CK =
t
RFC (MIN)
9
t
CK (MIN);
t
CK (MIN);
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
DD
4W
3N
5A
2P
2F
3P
4R
0
1
5
6
7
1
1
2
2
1
2
2
2
1
2
2
1
Electrical Specifications
1,280
1,176
-40B
416
496
400
280
480
736
736
32
48
32
©2004 Micron Technology, Inc. All rights reserved.
1,280
1,096
-335
376
476
400
240
440
656
656
32
48
32
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA