MT18VDDF12872Y-40BF1 Micron Technology Inc, MT18VDDF12872Y-40BF1 Datasheet - Page 15
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MT18VDDF12872Y-40BF1
Manufacturer Part Number
MT18VDDF12872Y-40BF1
Description
MODULE DDR SDRAM 1GB 184-DIMM
Manufacturer
Micron Technology Inc
Specifications of MT18VDDF12872Y-40BF1
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
400MT/s
Package / Case
184-DIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
184RDIMM
Device Core Size
72b
Organization
128Mx72
Total Density
1GByte
Chip Density
512Mb
Access Time (max)
700ps
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
2.6V
Operating Current
1.8A
Number Of Elements
18
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
184
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1233
MT18VDDF12872Y-40BF1
MT18VDDF12872Y-40BF1
Table 12: IDD Specifications and Conditions – 1GB
DDR SDRAM components only
Notes: 1–5, 8, 10, 12, 48; notes appear on pages 18–20; 0°C
pdf: 09005aef80f6b913, source: 09005aef80f6b41c
DDAF18C64_128x72G.fm - Rev. C 9/04 EN
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
(MIN);
cyle; Address and control inputs changing once every two clock cycles
OPERATING CURRENT: One device bank; Active -Read Precharge; Burst =
4;
inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks idle;
Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
MIN; CKE = HIGH; Address and other control inputs changing once per
clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active;
Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device bank;
Active-Precharge;
inputs changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One bank
active; Address and control inputs changing once per clock cycle;
t
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One device
bank active; Address and control inputs changing once per clock cycle;
t
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
OPERATING CURRENT: Four device bank interleaving READs (BL = 4)
with auto precharge,
control inputs change only during Active READ, or WRITE commands
CK =
CK =
t
RC =
t
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
CK (MIN); I
t
CK =
t
RC (MIN);
t
IN
CK (MIN); DQ, DM and DQS inputs changing once per clock
= V
OUT
t
REF
t
RC =
CK =
t
t
CK =
CK =
= 0mA
t
for DQ, DQS, and DM
RC =
t
RAS (MAX);
t
CK (MIN); I
t
t
CK (MIN); CKE = (LOW)
CK (MIN); CKE = LOW
t
RC (MIN);
0.2V
OUT
t
CK =
t
CK =
= 0mA; Address and control
t
CK (MIN); DQ, DM andDQS
t
CK (MIN); Address and
t
t
REFC =
REFC = 7.8125µs
t
RFC (MIN)
t
RC =
t
15
CK =
T
512MB, 1GB (x72, ECC, SR) PC3200
A
t
+70°C; V
RC
t
CK
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM RDIMM
DD
SYMBOL
= V
I
I
I
I
I
I
I
DD4W
I
I
I
DD3N
DD4R
DD5A
I
I
DD2P
DD2F
DD3P
DD
DD
DD1
DD6
DD7
DD
0
5
Q = +2.6V ±0.1V
MAX
2,790
3,330
1,080
3,420
3,510
6,210
8,100
-40B
990
810
198
90
90
©2004 Micron Technology, Inc. All rights reserved.
UNITS
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28, 45
21, 28, 45
NOTES
20, 43
20, 43
20, 43
20, 45
24, 45
20, 44
46
42
20
9