MT16LSDF6464HG-133D2 Micron Technology Inc, MT16LSDF6464HG-133D2 Datasheet - Page 20
![MODULE SDRAM 512MB 144SODIMM](/photos/7/83/78349/mfg_mt_sodimm_series_sml.jpg)
MT16LSDF6464HG-133D2
Manufacturer Part Number
MT16LSDF6464HG-133D2
Description
MODULE SDRAM 512MB 144SODIMM
Manufacturer
Micron Technology Inc
Specifications of MT16LSDF6464HG-133D2
Memory Type
SDRAM
Memory Size
512MB
Speed
133MHz
Package / Case
144-SODIMM
Main Category
DRAM Module
Sub-category
SDRAM
Module Type
144SODIMM
Device Core Size
64b
Organization
64Mx64
Total Density
512MByte
Chip Density
256Mb
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Operating Current
1.096A
Number Of Elements
16
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
144
Mounting
Socket
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT16LSDF6464HG-133D2
Manufacturer:
MICRON
Quantity:
1
Table 20: Serial Presence-Detect Matrix
“1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; V
pdf: 09005aef807924d2, source: 09005aef807924f1
SDF16C32_64x64HG.fm - Rev. E 4/06 EN
BYTE
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
0
1
2
3
4
5
6
7
8
9
Number of bytes used by Micron
Total number of SPD memory bytes
Memory type
Number of row addresses
Number of column addresses
Number of banks
Module data width
Module data width (continued)
Module voltage interface levels
SDRAM cycle time,
(CL = 3)
SDRAM access from clock,
(CL = 3)
Module configuration type
Refresh rate/type
SDRAM width (primary SDRAM)
Error-checking SDRAM data width
MIN clock delay from back-to-back random
column addresses,
Burst lengths supported
Number of banks on SDRAM device
CAS latencies supported
CS latency
WE latency
SDRAM module attributes
SDRAM device attributes: General
SDRAM cycle time,
(CL = 2)
SDRAM access from CLK,
(CL = 2)
SDRAM cycle time,
(CL = 1)
SDRAM access from CLK,
(CL = 1)
MIN row precharge time,
MIN row active-to-row active,
MIN RAS#-to-CAS# delay,
MIN RAS# pulse width,
DESCRIPTION
t
t
t
t
CCD
CK
CK
CK
t
RAS
t
t
t
AC
AC
t
RCD
t
RP
AC
t
RRD
ENTRY (VERSION)
DD
5.4ns (-13E/-133)
10ns (-133/-10E)
20ns (-133/-10E)
20ns (-133/-10E)
20
1, 2, 4, 8, page
6ns (-133/-10E)
or 7.81µs/self
= +3.3V ±0.3V
Unbuffered
7.5ns (-133)
5.4ns (-13E)
15ns (-13E)
14ns (-13E)
15ns (-133)
20ns (-10E)
15ns (-13E)
45ns (-13E)
50ns (-10E)
7.5ns (13E)
44ns (133)
7ns (-13E)
8ns (-10E)
6ns (-10E)
12 or 13
SDRAM
15.6µs
LVTTL
NONE
128
256
2, 3
10
64
14
2
0
8
1
4
0
0
–
–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
144-PIN SDRAM SODIMM
256MB, 512MB (x64, DR)
MT16LSDF3264H
0A
A0
2D
80
08
04
0C
02
40
00
01
70
75
80
54
60
00
80
08
00
01
04
06
01
01
00
0E
75
54
60
00
00
14
0E
14
14
2C
32
8F
0F
0F
0F
©2006 Micron Technology, Inc. All rights reserved.
MT16LSDF6464H
0D
0A
A0
2D
80
08
04
02
40
00
01
70
75
80
54
60
00
82
08
00
01
01
01
00
0E
75
54
60
00
00
14
0E
14
14
2C
32
8F
0F
0F
0F
4
6