MT18LSDT12872AG-13EC1 Micron Technology Inc, MT18LSDT12872AG-13EC1 Datasheet - Page 20
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MT18LSDT12872AG-13EC1
Manufacturer Part Number
MT18LSDT12872AG-13EC1
Description
MODULE SDRAM 1GB 168DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT18LSDT12872AG-133C1.pdf
(29 pages)
Specifications of MT18LSDT12872AG-13EC1
Memory Type
SDRAM
Memory Size
1GB
Speed
133MHz
Package / Case
168-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
PDF: 09005aef8088b1bf/Source: 09005aef808807ca
SD9_18C64_128X72AG.fm - Rev. C 6/05 EN
23. The clock frequency must remain constant (stable clock is defined as a signal cycling
24. Auto precharge mode only. The precharge timing budget (
25. Precharge mode only.
26. JEDEC and PC100 specify three clocks.
27.
28. Parameter guaranteed by design.
29. For -13E, CL = 2 and
30. CKE is HIGH during refresh command period
31. Refer to device data sheet for timing waveforms.
32. The value of
33. Leakage number reflects the worst-case leakage possible through the module pin, not
within timing constraints specified for the clock pin) during access or precharge
states (READ, WRITE, including
used to reduce the data rate.
and 7.5ns for -133, after the first clock delay, after the last WRITE is executed. May not
exceed limit set for precharge mode.
t
limit is actually a nominal value and does not result in a fail value.
what each memory device contributes.
AC for -133/-13E at CL = 3 with no load is 4.6ns and is guaranteed by design.
512MB (SR), 1GB (DR): (x72, ECC) 168-Pin SDRAM UDIMM
t
RAS used in -13E speed grade modules is calculated from
t
CK = 7.5ns; for -133, CL = 3 and
20
t
WR, and PRECHARGE commands). CKE may be
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RFC (MIN) else CKE is LOW. The I
t
CK = 7.5ns.
t
RP) begins at 7ns for -13E;
©2002 Micron Technology, Inc. All rights reserved.
t
RC -
t
RP.
Notes
DD
6