MT9VDVF6472Y-40BF1 Micron Technology Inc, MT9VDVF6472Y-40BF1 Datasheet - Page 8
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MT9VDVF6472Y-40BF1
Manufacturer Part Number
MT9VDVF6472Y-40BF1
Description
MODULE DDR 512MB 184-DIMM VLP
Manufacturer
Micron Technology Inc
Datasheet
1.MT9VDVF6472G-40BD4.pdf
(12 pages)
Specifications of MT9VDVF6472Y-40BF1
Memory Type
DDR SDRAM
Memory Size
512MB
Speed
400MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
I
Table 8:
PDF: 09005aef81c737fb/Source: 09005aef81c7379d
DVF9C64x72.fm - Rev. B 10/07 EN
Parameter/Condition
Operating one bank active-precharge current:
DQ, DM, and DQS inputs changing once per clock cycle; Address and control inputs
changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 2;
t
Precharge power-down standby current: All device banks idle; Power-down
mode;
Idle standby current: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock cycle;
V
Active power-down standby current: One device bank active; Power-down mode;
t
Active standby current: CS# = HIGH; CKE = HIGH; One device bank active;
t
cycle; Address and other control inputs changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads; One device bank
active; Address and control inputs changing once per clock cycle;
I
Operating burst write current: BL = 2; Continuous burst writes; One device bank
active; Address and control inputs changing once per clock cycle;
DM, and DQS inputs changing twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank interleaving reads;
BL = 4 with auto precharge;
inputs change only during active READ or WRITE commands
DD
CK =
CK =
RC =
OUT
IN
= V
= 0mA
Specifications
t
t
t
RAS (MAX);
CK (MIN); I
CK (MIN); CKE = LOW
REF
t
CK =
for DQ, DM, and DQS
t
CK (MIN); CKE = LOW
I
Values are shown for the MT46V64M8 DDR SDRAM only and are computed from values specified in the
512Mb (64 Meg x 8) component data sheet
DD
OUT
Specifications and Conditions – 512MB
t
CK =
= 0mA; Address and control inputs changing once per clock cycle
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock
t
RC =
t
RC (MIN);
t
CK =
t
t
CK (MIN); Address and control
RC =
t
RC (MIN);
t
512MB (x72, ECC, SR) 184-Pin DDR VLP RDIMM
CK =
8
t
t
REFC =
REFC = 7.8125µs
t
t
CK (MIN);
RC =
t
t
CK =
CK =
t
CK =
t
RFC (MIN)
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
RC (MIN);
t
t
CK (MIN); DQ,
CK (MIN);
t
CK (MIN);
Symbol
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
Electrical Specifications
4W
3N
5A
2P
2F
3P
4R
0
1
5
6
7
©2005 Micron Technology, Inc. All rights reserved.
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1,665
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1,170
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3,645
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315
450
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90
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Units
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mA
mA
mA
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