AFBR-5805Z Avago Technologies US Inc., AFBR-5805Z Datasheet - Page 2

• Manufacturer Part Number: AFBR-5805Z
• Description: TXRX ATM SONET OC3 3V SC 1X9
• Manufacturer: Avago Technologies US Inc.
• Series: -r

Specifications of AFBR-5805Z

• Wavelength: 1310nm
• Applications: General Purpose
• Voltage - Supply: 3.3V
• Connector Type: SC
• Mounting Type: Through Hole
• Function: Provides the system designer with products to implement a range of soluntions for multimode fiber SONET OC-3 (SDH STM-1)
• Product: Transceiver
• Data Rate: 155 Mbps
• Maximum Rise Time: 3 ns/2.2 ns
• Maximum Fall Time: 3 ns/2.2 ns
• Pulse Width Distortion: 1.2 ns (Max)/1.91 ns (Max)
• Maximum Output Current: 50 mA
• Operating Supply Voltage: 3.135 V to 3.5 V or 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Package / Case: SIP-9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: Multimode Glass
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Transmitter Sections
The transmitter section of the AFBR-5803Z and AFBR-
5805Z series utilize 1300 nm InGaAsP LEDs. These LEDs
are packaged in the optical subassembly portion of the
transmitter section. They are driven by a custom silicon
IC which converts differential PECL logic signals, ECL
referenced (shifted) to a +3.3 V or +5.0 V supply, into an
analog LED drive current.
Receiver Sections
The receiver section of the AFBR-5803Z and AFBR-5805Z
series utilize InGaAs PIN photodiodes coupled to a
custom silicon transimpedance preamplifier IC. These
are packaged in the optical subassembly portion of the
receiver.
These PIN/preamplifier combinations are coupled to a
custom quantizer IC which provides the final pulse shap-
ing for the logic output and the Signal Detect function.
The data output is dif-ferential. The signal detect output
is single-ended. Both data and signal detect outputs are
PECL compatible, ECL referenced (shifted) to a 3.3 V or
+5.0 V power supply.
Package
The overall package concept for the Avago Technologies
transceivers consists of three basic elements; the two
optical subassemblies, an electrical subassembly and
the housing as illustrated in Figure 1 and Figure 1a.
The package outline drawing and pin out are shown in
Figures 2, 2a and 3. The details of this package outline
and pin out are compliant with the multisource defini-
tion of the 1 x 9 SIP. The low profile of the Avago Tech-
DIFFERENTIAL
DATA OUT
SINGLE-ENDED
SIGNAL
DETECT OUT
DIFFERENTIAL
DATA IN

Figure 1. SC Connector Block Diagram
ELECTRICAL SUBASSEMBLY
QUANTIZER IC
DRIVER IC
PREAMP IC
TOP VIEW
DUPLEX SC
RECEPTACLE
PIN PHOTODIODE
OPTICAL
SUBASSEMBLIES
LED
nologies transceiver design complies with the maximum
height allowed for the duplex SC connector over the
entire length of the package.
The optical subassemblies utilize a high volume assem-
bly process together with low cost lens elements which
result in a cost effective building block.
The electrical subassembly consists of a high volume
multilayer printed circuit board on which the IC chips
and various surface-mounted passive circuit elements
are attached.
The package includes internal shields for the electrical
and optical subassemblies to ensure low EMI emissions
and high immunity to external EMI fields.
The outer housing including the duplex SC connector or
the duplex ST ports is molded of filled nonconductive
plastic to provide mechanical strength and electrical
isolation. The solder posts of the Avago Technologies
design are isolated from the circuit design of the trans-
ceiver and do not require connection to a ground plane
on the circuit board.
The transceiver is attached to a printed circuit board
with the nine signal pins and the two solder posts which
exit the bottom of the housing. The two solder posts
provide the primary mechanical strength to withstand
the loads imposed on the transceiver by mating with
duplex or simplex SC or ST connectored fiber cables.