DM-COP8/44P National Semiconductor, DM-COP8/44P Datasheet - Page 118
DM-COP8/44P
Manufacturer Part Number
DM-COP8/44P
Description
CABLE FOR DEBUG MODULE 44-PLCC
Manufacturer
National Semiconductor
Datasheet
1.DM-COP820D.pdf
(254 pages)
Specifications of DM-COP8/44P
Accessory Type
44-PLCC Target Cable
For Use With/related Products
MetaLink Debug Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*DM-COP8/44P
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- Download datasheet (2Mb)
Syntax:
Description:
Operation:
2-80
INTR
Instruction
COP8SAx7 MICROCONTROLLER
INTR
This zero opcode software trap instruction first stores its return address
in the data memory software stack and then branches to program mem-
ory location 00FF. This memory location is the common switching point
for all COP888 interrupts, both hardware and software. The program
starting at memory location 00FF sorts out the priority of the various in-
terrupts and then vectors to the correct interrupt service routine.
In order to save the return address, the contents of PCL (Lower 8 bits of
PC) are transferred to the data memory location referenced by SP (Stack
Pointer). SP is then decremented. The contents of PCU (Upper 7 bits of
PC) are transferred to the new data memory location referenced by SP.
Then SP is again decremented to set up the software stack for the next
interrupt or subroutine.
The INTR instruction is not meant to be programmed explicitly, but
rather to be automatically invoked when certain error conditions occur.
The reading of undefined (non-existent) program memory produces all
zeros, which in turn invokes the INTR instruction. A similar software
trap can be set up if the subroutine Stack Pointer (SP) is initialized to
the data memory location at the top of user RAM space. Then if the soft-
ware stack is ever overpopped (more subroutine or interrupt returns
than calls), all ones will be returned from the undefined (non-existent)
RAM. This will cause the program to return to the program address
FFFF Hex, which in turn will read all zeros and once again invoke the
software trap INTR instruction.
[SP] <- PCL
[SP - 1] <- PCU
[SP - 2] : SET UP FOR NEXT STACK REFERENCE
PC <- 0FF
Implicit
Addressing Mode
Instruction
Cycles
7
Bytes Hex Op Code
1
00
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