DM-COP8/44P National Semiconductor, DM-COP8/44P Datasheet - Page 120
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DM-COP8/44P
Manufacturer Part Number
DM-COP8/44P
Description
CABLE FOR DEBUG MODULE 44-PLCC
Manufacturer
National Semiconductor
Datasheet
1.DM-COP820D.pdf
(254 pages)
Specifications of DM-COP8/44P
Accessory Type
44-PLCC Target Cable
For Use With/related Products
MetaLink Debug Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*DM-COP8/44P
- Current page: 120 of 254
- Download datasheet (2Mb)
Syntax:
Description:
Operation:
2-82
JMP ADDR
Instruction
COP8SAx7 MICROCONTROLLER
JMP ADDR
This instruction jumps to the programmed memory address. The value
found in the lower nibble (4 bits) of the first byte of the instruction is
transferred to the lower nibble of PCU (Upper 7 bits of PC), and then the
value found in the second byte of the instruction is transferred to PCL
(Lower 8 bits of PC). The program then jumps to the program memory
location accessed by PC.
The address range is 15 bits. The JMP instruction address contents is
only 12 bits. Resolution of the high 3 bits of the address is to the 4K
memory segment containing the low byte of the instruction. The fol-
lowing diagram illustrates:
If instruction byte 2 is in 4K segment 0, the jump address is in segment
0.
If instruction byte 2 is in 4K segment 1, the jump address is in segment
1.
PC11-8 <- HIADDR (HIGH NIBBLE OF SECOND BYTE OF INSTRUC-
TION, LOW NIBBLE OF FIRST BYTE OF INSTRUCTION)
PC7-0 <- LOADDR (SECOND BYTE OF INSTRUCTION)
Absolute
Addressing
JMP WITHIN SEGMENT
0000
Mode
0xxx
2x
Instruction
Cycles
xx . . . . . .
3
0FFF
2x
Bytes
2
1000
JMP SPANS TO NEXT SEGMENT
xx
2HIADDR/LOADDR
Hex Op Code
1xxx
1FFF
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