AS5040 PB austriamicrosystems, AS5040 PB Datasheet - Page 16

• Manufacturer Part Number: AS5040 PB
• Description: BOARD PROGRAM AS5040
• Manufacturer: austriamicrosystems

Specifications of AS5040 PB

• Module/board Type: ZIF Socket
• For Use With/related Products: AS5000 Programmer, AS5040
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption
• Other names: AS5045 PB; AS5140H PB; AS5145 PB

AS5040
Data Sheet
Figure 12: U, V and V-signals for BLDC Motor Commutation (Div1=0, Div0=0)
Figure 13: U, V and W-signals for 2-pole BLDC Motor Commutation (Div1=1; Div0=0)
12 Programming the AS5040
After power-on, programming the AS5040 is enabled with the rising edge of CSn with Prog = high and CLK = low. 16
bit configuration data must be serially shifted into the OTP register via the Prog-pin. The first “CCW” bit is followed by
the zero position data (MSB first) and the incremental mode setting as shown in Table 6. Data must be valid at the
rising edge of CLK (see Figure 14).
After writing data into the OTP register it can be permanently programmed by rising the Prog pin to the programming
voltage V
mode, the chip must be reset by a power-on-reset. The programmed data is available after the next power-up.
Note: During the programming process, the transitions in the programming current may cause high voltage spikes
generated by the inductance of the connection cable. To avoid these spikes and possible damage to the IC, the
connection wires, especially the signals Prog and VSS must be kept as short as possible. The maximum wire length
between the V
suppress eventual voltage spikes, a 10nF ceramic capacitor should be connected close to pins Prog and VSS. This
capacitor is only required for programming, it is not required for normal operation.
The clock timing t
(see Figure 14). Additionally, the programming supply voltage should be buffered with a 10µF capacitor mounted
close to the switching transistor. This capacitor aids in providing peak currents during programming.
The specified programming voltage at pin Prog is 7.3 – 7.5V (see section 0). To compensate for the voltage drop
across the V
Figure 16).
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U
V
W
CW Direction
Position:
CW Direction
Position:
Angle:
PROG
Angle:
Commutation - Mode 3.2
U
V
W
PROG
Commutation - Mode 3.0
. 16 CLK pulses (t
PROG
clk
switching transistor, the applied programming voltage may be set slightly higher (7.5 - 8.0V, see
0.0
0
must be selected at a proper rate to ensure that the signal Prog is stable at the rising edge of CLK
0.0
0
switching transistor and pin Prog (see Figure 16) should not exceed 50mm (2 inches). To
Width: 256 Steps
29.88
85
60.12
171
60.12
171
PROG
Width: 512 Steps
) must be applied to program the fuses (Figure 15). To exit the programming
256
90.0
Width: 256 Steps
119.88
119.88
341
341
(Two-pole-pairs)
(One-pole-pair)
150.12
427
Revision 2.10
180.0
180.0
512
512
209.88
597
240.12
683
240.12
683
Width: 512 Steps
270.00
768
299.88
853
299.88
853
330.12
939
360.0
0
360.0
0
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