C8051T606ZDB Silicon Laboratories Inc, C8051T606ZDB Datasheet - Page 173

CARD DAUGHTER QFN10 SOCKET

C8051T606ZDB

Manufacturer Part Number
C8051T606ZDB
Description
CARD DAUGHTER QFN10 SOCKET
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of C8051T606ZDB

Module/board Type
Socket Module - QFN
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T606
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1668
26.5. Register Descriptions for PCA0
Following are detailed descriptions of the special function registers related to the operation of the PCA.
SFR Definition 26.1. PCA0CN: PCA Control
SFR Address = 0xD8; Bit-Addressable
Name
Reset
Bit
5:3
Type
7
6
2
1
0
Bit
Unused
Name
CCF2
CCF1
CCF0
CR
CF
R/W
CF
7
0
PCA Counter/Timer Overflow Flag.
Set by hardware when the PCA Counter/Timer overflows from 0xFFFF to 0x0000.
When the Counter/Timer Overflow (CF) interrupt is enabled, setting this bit causes the
CPU to vector to the PCA interrupt service routine. This bit is not automatically cleared
by hardware and must be cleared by software.
PCA Counter/Timer Run Control.
This bit enables/disables the PCA Counter/Timer.
0: PCA Counter/Timer disabled
1: PCA Counter/Timer enabled.
Unused. Read = 000b, Write = Don't care.
PCA Module 2 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF2 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 1 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF1 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 0 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF0 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
R/W
CR
6
0
R
5
0
Rev. 1.2
R
4
0
Function
C8051T600/1/2/3/4/5/6
R
3
0
CCF2
R/W
2
0
CCF1
R/W
1
0
CCF0
R/W
0
0
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